Datasheet > GS8161Z36DT-250VT

GS8161Z36DT-250VT

更新时间： 2024-11-24 07:44:19

品牌	Logo	应用领域
GSI		静态存储器内存集成电路
页数	文件大小	规格书
35页	488K
描述
ZBT SRAM, 512KX36, 5.5ns, CMOS, PQFP100, ROHS COMPLIANT, TQFP-100

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GS8161Z36DT-250VT 技术参数

生命周期：	Obsolete	零件包装代码：	QFP
包装说明：	QFP,	针数：	100
Reach Compliance Code：	compliant	ECCN代码：	3A991.B.2.B
HTS代码：	8542.32.00.41	风险等级：	5.6
最长访问时间：	5.5 ns	其他特性：	FLOW THROUGH AND PIPELINED ARCHITECTURE, ALSO OPERATES AT 2.5V
JESD-30 代码：	R-PQFP-G100	内存密度：	18874368 bit
内存集成电路类型：	ZBT SRAM	内存宽度：	36
功能数量：	1	端子数量：	100
字数：	524288 words	字数代码：	512000
工作模式：	SYNCHRONOUS	最高工作温度：	70 °C
最低工作温度：		组织：	512KX36
封装主体材料：	PLASTIC/EPOXY	封装代码：	QFP
封装形状：	RECTANGULAR	封装形式：	FLATPACK
并行/串行：	PARALLEL	最大供电电压 (Vsup)：	2 V
最小供电电压 (Vsup)：	1.7 V	标称供电电压 (Vsup)：	1.8 V
表面贴装：	YES	技术：	CMOS
温度等级：	COMMERCIAL	端子形式：	GULL WING
端子位置：	QUAD

GS8161Z36DT-250VT 数据手册

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Preliminary

GS8161ZxxD(GT/D)-xxxV

333 MHz–150 MHz

1.8 V or 2.5 V V_DD

100-Pin TQFP & 165-Bump BGA

Commercial Temp

Industrial Temp

18Mb Pipelined and Flow Through

Synchronous NBT SRAM

1.8 V or 2.5 V I/O

Because it is a synchronous device, address, data inputs, and

read/ write control inputs are captured on the rising edge of the

input clock. Burst order control (LBO) must be tied to a power

rail for proper operation. Asynchronous inputs include the

Sleep mode enable, ZZ and Output Enable. Output Enable can

be used to override the synchronous control of the output

drivers and turn the RAM's output drivers off at any time.

Write cycles are internally self-timed and initiated by the rising

edge of the clock input. This feature eliminates complex off-

chip write pulse generation required by asynchronous SRAMs

and simplifies input signal timing.

Features

• User-configurable Pipeline and Flow Through mode

• NBT (No Bus Turn Around) functionality allows zero wait

read-write-read bus utilization

• Fully pin-compatible with both pipelined and flow through

NtRAM™, NoBL™ and ZBT™ SRAMs

• IEEE 1149.1 JTAG-compatible Boundary Scan

• 1.8 V or 2.5 V core power supply

• 1.8 V or 2.5 V I/O supply

• LBO pin for Linear or Interleave Burst mode

• Pin-compatible with 2Mb, 4Mb, 8Mb, 36Mb, 72Mb and

144Mb devices

The GS8161ZxxD(GT/D)-xxxV may be configured by the user

to operate in Pipeline or Flow Through mode. Operating as a

pipelined synchronous device, in addition to the rising-edge-

triggered registers that capture input signals, the device

incorporates a rising-edge-triggered output register. For read

cycles, pipelined SRAM output data is temporarily stored by

the edge triggered output register during the access cycle and

then released to the output drivers at the next rising edge of

clock.

• Byte write operation (9-bit Bytes)

• 3 chip enable signals for easy depth expansion

• ZZ pin for automatic power-down

• JEDEC-standard 165-bump BGA package

• RoHS-compliant 100-pin TQFP and BGA packages available

Functional Description

The GS8161ZxxD(GT/D)-xxxV is an 18Mbit Synchronous

Static SRAM. GSI's NBT SRAMs, like ZBT, NtRAM, NoBL

or other pipelined read/double late write or flow through read/

single late write SRAMs, allow utilization of all available bus

bandwidth by eliminating the need to insert deselect cycles

when the device is switched from read to write cycles.

The GS8161ZxxD(GT/D)-xxxV is implemented with GSI's

high performance CMOS technology and is available in

JEDEC-standard 165-bump FP-BGA package.

Parameter Synopsis

-333

-250

-200

-150

Unit

3.0

4.0

3.0

5.0

3.8

6.7

Pipeline

3-1-1-1

tCycle

Curr (x18)

Curr (x36)

TBD

5.0

5.5

6.5

7.5

Flow

Through

2-1-1-1

tCycle

Curr (x18)

Curr (x36)

TBD

Rev: 1.00 6/2011

1/35

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

12 3 4 5 6 7...35

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与GS8161Z36DT-250VT相关器件

型号	品牌	获取价格	描述	数据表
GS8161Z36DT-333I	GSI	获取价格	ZBT SRAM, 512KX36, 4.5ns, CMOS, PQFP100, ROHS COMPLIANT, TQFP-100
GS8161Z36DT-333IT	GSI	获取价格	ZBT SRAM, 512KX36, 4.5ns, CMOS, PQFP100, ROHS COMPLIANT, TQFP-100
GS8161Z36DT-333IVT	GSI	获取价格	ZBT SRAM, 512KX36, 5ns, CMOS, PQFP100, ROHS COMPLIANT, TQFP-100
GS8161Z36DT-333V	GSI	获取价格	ZBT SRAM, 512KX36, 5ns, CMOS, PQFP100, ROHS COMPLIANT, TQFP-100
GS8161Z36DT-333VT	GSI	获取价格	ZBT SRAM, 512KX36, 5ns, CMOS, PQFP100, ROHS COMPLIANT, TQFP-100
GS8161Z36DT-375IT	GSI	获取价格	ZBT SRAM, 512KX36, 4.2ns, CMOS, PQFP100, ROHS COMPLIANT, TQFP-100
GS8161Z36DT-375T	GSI	获取价格	ZBT SRAM, 512KX36, 4.2ns, CMOS, PQFP100, ROHS COMPLIANT, TQFP-100
GS8161Z36DT-400I	GSI	获取价格	ZBT SRAM, 512KX36, 4ns, CMOS, PQFP100, ROHS COMPLIANT, TQFP-100
GS8161Z36DT-400IT	GSI	获取价格	ZBT SRAM, 512KX36, 4ns, CMOS, PQFP100, ROHS COMPLIANT, TQFP-100
GS8161Z36GD-133IT	GSI	获取价格	ZBT SRAM, 512KX36, 8.5ns, CMOS, PBGA165, 13 X 15 MM, 1 MM PITCH, FBGA-165

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