5秒后页面跳转
GD16131-GLP PDF预览

GD16131-GLP

更新时间: 2024-09-24 23:53:39
品牌 Logo 应用领域
其他 - ETC 复用器异步传输模式ATM
页数 文件大小 规格书
11页 115K
描述
ATM Multiplexer

GD16131-GLP 数据手册

 浏览型号GD16131-GLP的Datasheet PDF文件第2页浏览型号GD16131-GLP的Datasheet PDF文件第3页浏览型号GD16131-GLP的Datasheet PDF文件第4页浏览型号GD16131-GLP的Datasheet PDF文件第5页浏览型号GD16131-GLP的Datasheet PDF文件第6页浏览型号GD16131-GLP的Datasheet PDF文件第7页 
622 Mbit/s  
MUX/DeMUX  
Chip Set  
GD16131/GD16132  
General Description  
Features  
The GD16131, 32:4 / Quad 8:1 MUX and  
the GD16132, 4:32 / Quad 1:8 DeMUX  
are intended for use in 2.5 Gbit/s trans-  
mission systems. The high-speed inter-  
face is designed to accommodate the  
requirements of the GD16554 (4:1 MUX)  
and the GD16543 (1:4 DeMUX) both  
meeting CCITT specifications at  
2.5 Gbit/s SDH STM-16. The GD16131  
and GD16162 take care of the interface  
between the high-speed devices differen-  
tial ECL level I/O’s at 622 Mbit/s and  
lower speed CMOS gate arrays at  
78 Mbit/s. Hence they are dual supply  
devices shifting levels between true ECL  
and TTL.  
Thus the on-chip delay, except output  
buffer load dependant delay, is kept be-  
low 1 ns. A 622 MHz output clock with  
close timing relation to the data outputs  
also allows co-directional clocking. On  
both MUX and DeMUX, the subdivided  
78 MHz clock are also re-timed at the  
chip edge to cut down delay from the  
622 MHz input clock. The phase relation  
between low-speed data and the subdi-  
vided output clock are selectable in four  
phases.  
GD16131  
l
Quad 8:1 MUX  
l
All high-speed I/O’s are differential,  
ECL level.  
l
All low-speed I/O’s are TTL level,  
outputs drive 10 pF at 78 MHz.  
l
Subdivided output clock to data rela-  
tion selectable in four phases.  
l
The GD16131 and GD16132 are pack-  
aged in 68 pin Multi Layer Ceramic  
(MLC) packages, yielding excellent high-  
speed signal accommodation and ther-  
mal conditions. The chip set is designed  
for an operating temperature between  
–5 °C and +85 °C, case temperature.  
With power consumption of 1.3 W typical  
for both GD16131 and GD16132, only  
little or no heat sink is required.  
Dual supply: +5 V, -5.2 V.  
l
68 pin MLC flat package.  
l
The GD16131 and GD16132 are made  
as four identical blocks of 8 bit and a  
clock driver circuit. The 8 bit blocks are  
implemented as shift registers to obtain  
the best speed/power ratio of the process  
technology used. Also this means easy  
clock distribution with small delay be-  
tween incoming and outgoing signals.  
For the GD16131 the 622 Mbit/s data  
outputs are re-timed at the chip edge to  
cut down delay from clock-in to data-out,  
allowing counter directional clocking.  
High-speed pins on single side of  
package for easy PCB routing.  
l
Power consumption: 1.3 W typical.  
Bit naming convention  
GD16132  
Naming of pins on parallel ports is made  
assuming the transfer bit order to be in-  
creasing starting with position D0, D1, ...,  
D31.  
l
Quad 1:8 DeMUX  
l
All high-speed I/O’s are differential,  
ECL level.  
l
All low-speed I/O’s are TTL level,  
outputs drive 10 pF at 78 MHz.  
D0  
D4  
:
D24  
D0  
D4  
:
D24  
D28  
DO0P  
DO0N  
DI0P  
DI0N  
l
Subdivided output clock to data  
relation selectable in four phases.  
D28  
D1  
D5  
:
D25  
D1  
D5  
:
D25  
D29  
DO1P  
DO1N  
DI1P  
DI1N  
l
Dual supply: +5 V, -5.2 V.  
D29  
D2  
D6  
:
D26  
D2  
D6  
:
D26  
D30  
l
DO2P  
DO2N  
DI2P  
DI2N  
68 pin MLC flat package.  
D30  
l
D3  
D7  
:
D27  
D31  
D3  
D7  
:
D27  
D31  
High-speed pins on single side of  
package for easy PCB routing.  
DO3P  
DO3N  
DI3P  
DI3N  
VTT  
VEE  
VDD  
VCC  
VEE  
VDD  
VCC  
l
Power consumption: 1.3 W typical.  
CKOP  
Clock  
Generator  
CKON  
CKIP  
CKIN  
Clock  
Generator  
CKIP  
CKIN  
CKOUT  
CKOUT  
SEL1  
SEL2  
SEL1  
SEL2  
RESET  
RESET  

与GD16131-GLP相关器件

型号 品牌 获取价格 描述 数据表
GD16132-GLP ETC

获取价格

ATM Multiplexer
GD16333-QFP100 ETC

获取价格

ATM/SONET Demultiplexer
GD16360-48BA INTEL

获取价格

Support Circuit, 1-Func, PQFP48, 7 X 7 MM, 1.40 MM HEIGHT, HEAT SINK, PLASTIC, TQFP-48
GD16367B-52BA ETC

获取价格

ATM Multiplexer
GD16368B-52BA ETC

获取价格

ATM/SONET Demultiplexer
GD16504-144EA INTEL

获取价格

Clock Recovery Circuit, 1-Func, Bipolar, PBGA144, PLASTIC, FPBGA-144
GD16504-68BA INTEL

获取价格

Clock Recovery Circuit, 1-Func, Bipolar, CQFP68, MLC-68
GD16505-68BA INTEL

获取价格

Mux/Demux, 1-Func, BICMOS, CQFP68, MLC-68
GD16506-144EA INTEL

获取价格

Clock Recovery Circuit, 1-Func, PBGA144, PLASTIC, FPBGA-144
GD16506-68BA INTEL

获取价格

Clock Recovery Circuit, 1-Func, MLC-68