5秒后页面跳转
GAL16V8D-10LD PDF预览

GAL16V8D-10LD

更新时间: 2024-10-29 00:55:15
品牌 Logo 应用领域
莱迪思 - LATTICE /
页数 文件大小 规格书
8页 293K
描述
High Performance E2CMOS PLD Generic Array Logic™

GAL16V8D-10LD 数据手册

 浏览型号GAL16V8D-10LD的Datasheet PDF文件第2页浏览型号GAL16V8D-10LD的Datasheet PDF文件第3页浏览型号GAL16V8D-10LD的Datasheet PDF文件第4页浏览型号GAL16V8D-10LD的Datasheet PDF文件第5页浏览型号GAL16V8D-10LD的Datasheet PDF文件第6页浏览型号GAL16V8D-10LD的Datasheet PDF文件第8页 
Specifications GAL16V8/883  
fmax Descriptions  
CLK  
LOGIC  
ARRAY  
REGISTER  
CLK  
LOGIC  
ARRAY  
t
su  
tco  
REGISTER  
fmax with External Feedback 1/(tsu+tco)  
Note: fmax with external feedback is calculated from measured  
tsu and tco.  
t
cf  
pd  
CLK  
t
fmax with Internal Feedback 1/(tsu+tcf)  
LOGIC  
REGISTER  
ARRAY  
Note: tcf is a calculated value, derived by subtracting tsu from  
the period of fmax w/internal feedback (tcf = 1/fmax - tsu). The  
value of tcf is used primarily when calculating the delay from  
clocking a register to a combinatorial output (through registered  
feedback), as shown above. For example, the timing from clock  
to a combinatorial output is equal to tcf + tpd.  
tsu + th  
fmax with No Feedback  
Note: fmax with no feedback may be less than 1/(twh + twl). This  
is to allow for a clock duty cycle of other than 50%.  
Switching Test Conditions  
+5V  
Input Pulse Levels  
GND to 3.0V  
3ns 10% – 90%  
1.5V  
Input Rise and Fall Times  
Input Timing Reference Levels  
Output Timing Reference Levels  
R
1
1.5V  
Output Load  
See Figure  
3-state levels are measured 0.5V from steady-state active level.  
FROM OUTPUT (O/Q)  
UNDER TEST  
TEST POINT  
Output Load Conditions (see figure)  
C L*  
Test Condition  
R1  
R2  
CL  
R
2
A
390Ω  
750Ω  
750Ω  
750Ω  
750Ω  
750Ω  
50pF  
50pF  
50pF  
5pF  
B
Active High  
Active Low  
Active High  
Active Low  
390Ω  
C
390Ω  
5pF  
*C L INCLUDES TEST FIXTURE AND PROBE CAPACITANCE  
7

与GAL16V8D-10LD相关器件

型号 品牌 获取价格 描述 数据表
GAL16V8D-10LD/833 LATTICE

获取价格

High Performance E2CMOS PLD Generic Array Logic
GAL16V8D-10LD/883 ETC

获取价格

Electrically-Erasable PLD
GAL16V8D-10LJ LATTICE

获取价格

High Performance E2CMOS PLD Generic Array Logic
GAL16V8D-10LJI LATTICE

获取价格

High Performance E2CMOS PLD Generic Array Logic
GAL16V8D-10LJN LATTICE

获取价格

High Performance E2CMOS PLD Generic Array Log
GAL16V8D-10LJNI LATTICE

获取价格

High Performance E2CMOS PLD Generic Array Log
GAL16V8D-10LP LATTICE

获取价格

High Performance E2CMOS PLD Generic Array Logic
GAL16V8D-10LPI LATTICE

获取价格

High Performance E2CMOS PLD Generic Array Logic
GAL16V8D-10LPN LATTICE

获取价格

High Performance E2CMOS PLD Generic Array Log
GAL16V8D-10LPNI LATTICE

获取价格

High Performance E2CMOS PLD Generic Array Log