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FX929BD2 PDF预览

FX929BD2

更新时间: 2024-09-15 20:42:15
品牌 Logo 应用领域
CMLMICRO 电信光电二极管电信集成电路
页数 文件大小 规格书
47页 1631K
描述
Modem-Support Circuit, CMOS, PDSO24,

FX929BD2 技术参数

生命周期:Obsolete包装说明:SOP, DIP24,.6
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:5.74JESD-30 代码:R-PDSO-G24
长度:15.4 mm功能数量:1
端子数量:24最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:DIP24,.6
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
电源:3.3/5 V认证状态:Not Qualified
座面最大高度:2.65 mm子类别:Modems
最大压摆率:0.01 mA表面贴装:YES
技术:CMOS电信集成电路类型:MODEM-SUPPORT CIRCUIT
温度等级:INDUSTRIAL端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
宽度:7.5 mmBase Number Matches:1

FX929BD2 数据手册

 浏览型号FX929BD2的Datasheet PDF文件第2页浏览型号FX929BD2的Datasheet PDF文件第3页浏览型号FX929BD2的Datasheet PDF文件第4页浏览型号FX929BD2的Datasheet PDF文件第5页浏览型号FX929BD2的Datasheet PDF文件第6页浏览型号FX929BD2的Datasheet PDF文件第7页 
CML Semiconductor Products  
4-Level FSK Modem Data Pump FX929B  
Advance Information  
D/929B/1 May 1997  
Features  
Applications  
4800 to 19200 b/s Operation  
RCR STD-47 and RD-LAP* Systems  
Two-Way Paging Equipment  
Mobile Data Systems  
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Full Packet Data Framing  
4-Level FSK Data Modulation  
Low Power, 2.5mA at 3.3V  
Flexible Operating Modes  
Powersave Option  
Wireless Telemetry  
DataTACÒ Terminals  
Portable Wireless Data Equipment  
*Radio Data-Link Access Procedure (RD-LAP) is a data communications air interface protocol developed by Motorola Inc.  
1.1  
Brief Description  
The FX929B is a CMOS integrated circuit that contains all of the baseband signal processing and Medium  
Access Control (MAC) protocol functions required for a high performance 4-level FSK Wireless Packet Data  
Modem. It interfaces with the modem host processor and the radio modulation/demodulation circuits to deliver  
reliable two-way transfer of the application data over the wireless link. The FX929B is backwards compatible  
with the FX929A but offers better performance during radio link fading and selectable Tx symbol shapes.  
The FX929B assembles application data received from the processor, adds forward error correction (FEC) and  
error detection (CRC) information and interleaves the result for burst-error protection. After adding symbol and  
frame synchronisation codewords, it converts the packet into a filtered 4-level analogue baseband signal for  
modulating the radio transmitter.  
In receive mode, the FX929B performs the reverse function using the analogue baseband signals from the  
receiver discriminator. After error correction and removal of the packet overhead, the recovered application  
data is supplied to the processor. Any residual uncorrected errors in the data will be flagged. A readout of the  
SNR value during receipt of a packet is also provided.  
The FX929B uses data block sizes and FEC/CRC algorithms compatible with the RD-LAP and RCR STD-47  
over-air standards. The device is programmable to operate at most standard bit-rates from a wide choice of  
Xtal/clock frequencies.  
P4  
D2  
D5  
ã 1997 Consumer Microcircuits Limited  

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