FM25C160C-G

更新时间： 2024-02-17 22:38:17

品牌	Logo	应用领域
铁电 - RAMTRON		存储
页数	文件大小	规格书
13页	279K
描述
16Kb Serial 5V F-RAM Memory

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技术参数
数据手册

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FM25C160C-G 技术参数

是否无铅：	含铅	是否Rohs认证：	不符合
生命周期：	Contact Manufacturer	零件包装代码：	DIP
包装说明：	DIP,	针数：	8
Reach Compliance Code：	unknown	ECCN代码：	EAR99
HTS代码：	8542.32.00.51	风险等级：	5.8
最大时钟频率 (fCLK)：	2.1 MHz	JESD-30 代码：	R-PDIP-T8
JESD-609代码：	e0	长度：	9.817 mm
内存密度：	16384 bit	内存集成电路类型：	EEPROM
内存宽度：	8	功能数量：	1
端子数量：	8	字数：	2048 words
字数代码：	2000	工作模式：	SYNCHRONOUS
最高工作温度：	70 °C	最低工作温度：
组织：	2KX8	封装主体材料：	PLASTIC/EPOXY
封装代码：	DIP	封装形状：	RECTANGULAR
封装形式：	IN-LINE	并行/串行：	SERIAL
峰值回流温度（摄氏度）：	NOT SPECIFIED	认证状态：	Not Qualified
座面最大高度：	5.08 mm	串行总线类型：	SPI
最大供电电压 (Vsup)：	5.5 V	最小供电电压 (Vsup)：	4.5 V
标称供电电压 (Vsup)：	5 V	表面贴装：	NO
技术：	CMOS	温度等级：	COMMERCIAL
端子面层：	TIN LEAD	端子形式：	THROUGH-HOLE
端子节距：	2.54 mm	端子位置：	DUAL
处于峰值回流温度下的最长时间：	NOT SPECIFIED	宽度：	7.62 mm
最长写入周期时间 (tWC)：	10 ms	Base Number Matches：	1

FM25C160C-G 数据手册

FM25C160C - 16Kb 5V SPI F-RAM

WREN - Set Write Enable Latch

Data Transfer

All data transfers to and from the FM25C160C occur

in 8-bit groups. They are synchronized to the clock

signal (SCK) and they transfer most significant bit

(MSB) first. Serial inputs are clocked in on the rising

edge of SCK. Outputs are driven on the falling edge

of SCK.

The FM25C160C will power up with writes disabled.

The WREN command must be issued prior to any

write operation. Sending the WREN op-code will

allow the user to issue subsequent op-codes for write

operations. These include writing the status register

and writing the memory.

Command Structure

Sending the WREN op-code causes the internal Write

Enable Latch to be set. A flag bit in the status

WEL=1 indicates that writes are permitted. A write to

the status register has no effect on the WEL bit.

Completing any write operation will automatically

clear the write-enable latch and prevent further writes

without another WREN command. Figure 5 below

illustrates the WREN command bus configuration.

There are six commands called op-codes that can be

issued by the bus master to the FM25C160C. They

are listed in the table below. These op-codes control

the functions performed by the memory. They can be

divided into three categories. First, are commands

that have no subsequent operations. They perform a

single function such as to enable a write operation.

Second are commands followed by one byte, either in

or out. They operate on the status register. Last are

commands for memory transactions followed by

address and one or more bytes of data.

WRDI - Write Disable

The WRDI command disables all write activity by

clearing the Write Enable Latch. The user can verify

that writes are disabled by reading the WEL bit in the

status register and verifying that WEL=0. Figure 6

illustrates the WRDI command bus configuration.

Table 1. Op-code Commands

Name

WREN

WRDI

RDSR

WRSR

READ

WRITE

Description

Set Write Enable Latch

Write Disable

Read Status Register

Write Status Register

Read Memory Data

Write Memory Data

Op-code value

0000_0110b

0000_0100b

0000_0101b

0000_0001b

0000_0011b

0000_0010b

Figure 5. WREN Bus Configuration

Figure 6. WRDI Bus Configuration

Rev. 1.1

July 2011

Page 5 of 13

1 2 3 456 7 8...13

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与FM25C160C-G相关器件

型号	品牌	描述	获取价格	数据表
FM25C160C-GTR	RAMTRON	16Kb Serial 5V F-RAM Memory	获取价格
FM25C160-G	RAMTRON	Memory Circuit, 2KX8, CMOS, PDSO8, GREEN, MS-012AA, SOIC-8	获取价格
FM25C160-GA	RAMTRON	16Kb FRAM Serial Memory	获取价格
FM25C160-GTR	RAMTRON	Memory Circuit, 2KX8, CMOS, PDSO8, GREEN, MS-012AA, SOIC-8	获取价格
FM25C160-P	ETC	IC 16K SERIAL FRAM	获取价格
FM25C160-S	ETC	IC-SM-16K SERIAL FRAM	获取价格

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