Datasheet > FAN6550

FAN6550

更新时间： 2024-09-26 22:40:51

品牌	Logo	应用领域
飞兆/仙童 - FAIRCHILD		稳压器双倍数据速率
页数	文件大小	规格书
12页	102K
描述
2A DDR Bus Termination Regulator

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FAN6550 数据手册

www.fairchildsemi.com

FAN6550

2A DDR Bus Termination Regulator

Features

Description

• Can source and sink up to 2A continous, 3A peak

• No heatsink required

• Integrated Power MOSFETs

• Generates termination voltages for DDR SDRAM

• V_REFinput available for external voltage divider

• Separate voltages for V_CCQand PV_DD

• Buffered V_REFoutput

• V_OUTof 3ꢀ or less at 2A

• Minimum external components

• 0°C to 70°C operating range

• Shutdown for standby or suspend mode operation

• Thermal Shutdown ≈ 130ºC

The FAN6550 switching regulator is designed to convert

voltage supplies ranging from 2.3V to 4V into a desired out-

put voltage or termination voltage for DDR SDRAM mem-

ory. The FAN6550 can be implemented to produce regulated

output voltages in two different modes. In the default mode,

when the V_REFpin is open, the FAN6550 output voltage is

50ꢀ of the voltage applied to V_CCQ. The FAN6550 can also

be used to produce various user-deﬁned voltages by forcing a

voltage on the VREF_INpin. In this case, the output voltage

follows the input VREF_INvoltage. The switching regulator

is capable of sourcing or sinking up to 2A of current while

regulating an output V_TTvoltage to within 3ꢀ or less.

Transient output currents of 3A can also be accommodated.

The FAN6550 can also be used in conjunction with series

termination resisitors to provide an excellent voltage source

for active termination schemes of high speed transmission

lines as those seen in high speed memory buses and distrib-

uted backplane designs.

Block Diagram

VREF

SHDN

DD2

CCQ

OUT

DD1

OUT

OSCILLATOR/

RAMP

)

GENERATOR

–

200kΩ

OUT

BUFFER

REF

)

–

VREF

ERROR AMP

RAMP

COMPARATOR

200kΩ

AGND

–

GND2

GND

GND1

REV. 1.0.2 3/11/02

12 3 4 5 6 7...12

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