Datasheet > FAN5068DDR

FAN5068DDR

更新时间： 2024-02-10 13:17:23

品牌	Logo	应用领域
飞兆/仙童 - FAIRCHILD		/
页数	文件大小	规格书
4页	69K
描述
FAN5068 Component calculation and simulation tools

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FAN5068DDR 技术参数

是否Rohs认证：	符合	生命周期：	Obsolete
零件包装代码：	QFN	包装说明：	HVQCCN, LCC24,.19SQ,25
针数：	24	Reach Compliance Code：	compliant
ECCN代码：	EAR99	HTS代码：	8542.39.00.01
风险等级：	5.65	其他特性：	ALSO OPERATES AT 3.3 VOLT OUTPUT
模拟集成电路 - 其他类型：	SWITCHING CONTROLLER	控制模式：	CURRENT-MODE
控制技术：	PULSE WIDTH MODULATION	最大输入电压：	5.5 V
最小输入电压：	4.5 V	标称输入电压：	5 V
JESD-30 代码：	S-XQCC-N24	JESD-609代码：	e4
长度：	5 mm	湿度敏感等级：	1
功能数量：	1	端子数量：	24
最高工作温度：	85 °C	最低工作温度：	-10 °C
最大输出电流：	1.5 A	标称输出电压：	1.2 V
封装主体材料：	UNSPECIFIED	封装代码：	HVQCCN
封装等效代码：	LCC24,.19SQ,25	封装形状：	SQUARE
封装形式：	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE	峰值回流温度（摄氏度）：	260
认证状态：	Not Qualified	座面最大高度：	0.8 mm
子类别：	Switching Regulator or Controllers	表面贴装：	YES
切换器配置：	PUSH-PULL	最大切换频率：	345 kHz
温度等级：	OTHER	端子面层：	Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式：	NO LEAD	端子节距：	0.65 mm
端子位置：	QUAD	处于峰值回流温度下的最长时间：	NOT SPECIFIED
宽度：	5 mm	Base Number Matches：	1

FAN5068DDR 数据手册

www.fairchildsemi.com

AN-6006

FAN5068 Component calculation and

simulation tools

Background / Overview

To simplify designs using the FAN5068 DDR/ACPI control IC, Fairchild provides:

•

An Excel workbook to calculate recommended external component values

and

•

A continuous time behavioral model of the modulator that runs in PSPICE A/D v 9.1 or above. The model is

small enough to run under Cadence's Orcad Lite Edition (includes Orcad Capture and PSPICE A/D), which can

be ordered on CD or may be downloaded at:

http://www.orcad.com/downloads/demo/default.asp

Information on the FAN5068, including the datasheet can be found on:

http://www.fairchildsemi.com/pf/FA/FAN5068.html

This package of design aids (including this document) is can be downloaded from:

http://www.fairchildsemi.com/collateral/AN-6006.zip.

To install, copy AN-6006.ZIP to an empty folder (e.g. “FAN5068Design”). Then unzip AN-6006.ZIP into that

folder.

Recommended design procedure:

1. Use the spreadsheet (FAN5068 Design calculation aid.xls ) to calculate the output filter using the “Output

Filter” tab.

2. Use the “Main Sheet” tab of the spreadsheet to calculate the other component values once you have selected the

output L and C.

3. Use the “Compensation” tab to design the compensation network.

4. Input the values you have selected into the PSPICE model. Generate a Bode plot by simulating with the

“application circuit-ac sweep” simulation profile. Make sure to simulate over the corners of VIN and IOUT for

your application.

5. Once you are satisfied with the small signal stability, you can view the transient response by simulating using

the “application circuit-transient response” simulation profile. Be sure the follow the instructions at the bottom

of the Application Circuit, Page 1 sheet for resetting RLOAD before simulating transient response.

Design Calculation Spreadsheet: FAN5068 Design calculation aid.xls

For instructions on the use of this spreadsheet, see the “Instructions” tab of the spreadsheet.

PSPICE Simulation Model

The simulation model is a sampled data continuous time model, which is adapted from Ray Ridley and Dennis

Feucht's modeling work for current mode controllers^{1 2 3}. It is set up to provide a bode plot where the red trace is

Phase Margin (in degrees) and the green trace is gain (in dB). For stable response, we recommend at least 45° of

phase margin when the gain crosses 0dB. The model also provides transient response using a pulsed current source

(I1) as the load. The IC’s error-amp behavioral model is based on Ray Kendall’s Macromodelling article in EDN. ⁴

To run the model start Capture (9.1 or higher), open FAN5068.opj (this is the "project" file for Capture). Double

click on Page 1 Under .\fan5068.dsn\Application Circuit.

REV. 1.0.0 05/26/04

12 3 4

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