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FAN5078

更新时间: 2024-01-21 00:13:20
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 调节器双倍数据速率
页数 文件大小 规格书
16页 338K
描述
DDR/ACPI Regulator Combo

FAN5078 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:QFN
包装说明:HVQCCN,针数:24
Reach Compliance Code:unknown风险等级:5.74
其他特性:ALSO OPERATES IN AVERAGE CURRENT MODE模拟集成电路 - 其他类型:SWITCHING CONTROLLER
控制模式:CURRENT-MODE控制技术:PULSE WIDTH MODULATION
最大输入电压:5.5 V最小输入电压:4.5 V
标称输入电压:5 VJESD-30 代码:S-XQCC-N24
JESD-609代码:e4长度:5 mm
湿度敏感等级:1功能数量:1
端子数量:24最高工作温度:85 °C
最低工作温度:-10 °C最大输出电流:1.5 A
标称输出电压:3.3 V封装主体材料:UNSPECIFIED
封装代码:HVQCCN封装形状:SQUARE
封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE峰值回流温度(摄氏度):260
座面最大高度:0.8 mm表面贴装:YES
切换器配置:PUSH-PULL最大切换频率:345 kHz
温度等级:OTHER端子面层:NICKEL PALLADIUM GOLD
端子形式:NO LEAD端子节距:0.65 mm
端子位置:QUAD处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:5 mm

FAN5078 数据手册

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May 2006  
FAN5078  
DDR/ACPI Regulator Combo  
Features  
Description  
The FAN5078 DDR memory regulator combines a high-  
efficiency Pulse-Width Modulated (PWM) controller to  
generate the memory supply voltage, VDDQ, and a linear  
regulator to generate termination voltage (VTT).  
ƒ PWM regulator for VDDQ (2.5V or 1.8)  
ƒ Linear LDO regulator generates VTT = VDDQ/2,  
1.5A Peak sink/source capability  
ƒ AMT / M-state support  
Synchronous rectification provides high efficiency over a wide  
range of load currents. Efficiency is further enhanced by using  
the low-side MOSFET’s RDS(ON) to sense current.  
ƒ Control to generate 5V USB  
ƒ ACPI drive and control for 5V DUAL generation  
ƒ 3.3V internal LDO for 3V-ALW generation  
ƒ 300 kHz fixed frequency switching  
The VDDQ PWM regulator is a sampled current mode control  
with external compensation to achieve fast load-transient  
response and provide system design optimization.  
The VTT regulator derives its reference and takes its power  
from the VDDQ PWM regulator, output. The VTT termination  
regulator is capable of sourcing or sinking 1.5A peak currents.  
ƒ RDS(ON) current sensing or optional current sense resistor  
for precision over-current detect  
ƒ Internal synchronous boot diode  
ƒ Common Power Good signal for all voltages  
ƒ Input under-voltage lockout (UVLO)  
ƒ Thermal shutdown  
In S5 M1 mode, the VDDQ switcher, VTT regulator, and the  
3.3V regulators remain on. S3 mode keeps these regulators  
on, but also turns on an external P-Channel to provide 5V  
USB.  
A single soft-start capacitor enables controlled slew rates for  
both VDDQ and 3.3V-ALW outputs.  
ƒ Latched multi-fault protection  
ƒ Precision reference output for ULDO controllers  
ƒ 24-pin 5 x 5 MLP package  
PGOOD becomes true in S0 only after all regulators have  
achieved stable outputs.  
In S5 (EN = 0), the 3.3V internal LDO stays on while the other  
regulators are powered down.  
Applications  
ƒ DDR VDDQ and VTT voltage generation with ACPI  
support  
ƒ Desktop PC's  
ƒ Servers  
Ordering Information  
Part Number  
Temperature Range  
Package  
Packing  
FAN5078MPX  
-10°C to 85°C  
MLP-24 5x5mm  
Tape and Reel  
© 2006 Fairchild Semiconductor Corporation  
FAN5078 Rev. 1.0.0 • 05/09/06  
www.fairchildsemi.com  

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