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FAN5078D3MPX

更新时间: 2024-11-25 04:18:07
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 存储双倍数据速率
页数 文件大小 规格书
18页 605K
描述
Complete ACPI Compliant Power Solution for DDR3 Memory System

FAN5078D3MPX 数据手册

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February 2008  
FAN5078D3 — Complete ACPI Compliant Power Solution for  
DDR3 Memory System  
Features  
Description  
The FAN5078D3 DDR memory regulator combines a high-  
efficiency Pulse-Width Modulated (PWM) controller to  
generate the memory supply voltage, VDDQ, and a linear  
regulator to generate termination voltage (VTT).  
ƒ PWM regulator for VDDQ  
ƒ Linear LDO regulator generates VTT = VDDQ/2,  
1.5A peak sink/source capability  
FAN5078D3 can be configured to provide VDDQ and VTT  
power requirements for DDR3 version. For power  
requirements of DDR1 and DDR2 memory systems, refer to  
FAN5078.  
ƒ AMT / M-state support  
ƒ Control to generate 5V USB  
ƒ ACPI drive and control for 5V DUAL generation  
ƒ 3.3V internal LDO for 3V-ALW generation  
ƒ 300kHz fixed-frequency switching  
Synchronous rectification provides high efficiency over a  
wide range of load currents. Efficiency is further enhanced  
by using the low-side MOSFET’s RDS(ON) to sense current.  
The VDDQ PWM regulator is a sampled, current-mode  
control with external compensation to achieve fast load-  
transient response and provide system design optimization.  
ƒ RDS(ON) current sensing or optional current-sense resistor  
for precision over-current detect  
The VTT regulator derives its reference and takes its  
power from the VDDQ PWM regulator output. The VTT  
termination regulator is capable of sourcing or sinking up to  
1.5A peak currents.  
ƒ Internal synchronous boot diode  
ƒ Common Power-Good signal for all voltages  
ƒ Input under-voltage lockout (UVLO)  
ƒ Thermal shutdown  
In S5 M1 mode, the VDDQ switcher, VTT regulator, and the  
3.3V regulators remain on. S3 mode keeps these regulators  
on and turns on an external P-channel to provide 5V USB.  
ƒ Latched multi-fault protection  
A single soft-start capacitor enables controlled slew rates for  
both VDDQ and 3.3V-ALW outputs.  
ƒ Precision reference output for ULDO controllers  
ƒ 24-pin 5x5mm MLP package  
PGOOD becomes true in S0 only after all regulators have  
achieved stable outputs.  
Applications  
In S5 (EN = 0), the 3.3V internal LDO stays on while the  
other regulators are powered down.  
ƒ DDR VDDQ and VTT voltage generation with ACPI  
support for DDR3  
Related Resources  
ƒ Memory Power Solutions for Desktop PCs  
ƒ Memory Power Solutions for Servers  
Application Note AN-6005: Synchronous Buck MOSFET  
Loss Calculations with Excel Model  
Application Note AN-6006: FAN5068/FAN5078D3  
Components Calculations and Simulation Tools  
Ordering Information  
Part Number  
Temperature Range  
Package  
Packing  
FAN5078D3MPX  
-10°C to +85°C  
24-Lead, 5x5mm, Molded Leadless Package (MLP)  
Tape and Reel  
All packages are lead free per JEDEC: J-STD-020B standard.  
© 2008 Fairchild Semiconductor Corporation  
FAN5078D3 • Rev. 1.0.0  
www.fairchildsemi.com  

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