Datasheet > EVAL-AD9838SDZ

EVAL-AD9838SDZ

更新时间： 2024-11-27 10:16:51

品牌	Logo	应用领域
亚德诺 - ADI		数据分配系统
页数	文件大小	规格书
32页	604K
描述
11 mW Power, 2.3 V to 5.5 V, Complete DDS Power-down option

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数据手册

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EVAL-AD9838SDZ 数据手册

11 mW Power, 2.3 V to 5.5 V,

Complete DDS

AD9838

Capability for phase modulation and frequency modulation is

provided. The frequency registers are 28 bits wide: with a 16 MHz

clock rate, resolution of 0.06 Hz can be achieved; with a 5 MHz

clock rate, the AD9838 can be tuned to 0.02 Hz resolution.

Frequency and phase modulation are configured by loading

registers through the serial interface and by toggling the registers

using software or the FSELECT and PSELECT pins, respectively.

FEATURES

2.3 V to 5.5 V power supply

MCLK speed: 16 MHz (B grade), 5 MHz (A grade)

Output frequency up to 8 MHz

Sinusoidal and triangular outputs

On-board comparator

3-wire SPI interface

Extended temperature range: −40°C to +125°C

Power-down option

11 mW power consumption at 2.3 V

20-lead LFCSP

The AD9838 is written to via a 3-wire serial interface. This serial

interface operates at clock rates up to 40 MHz and is compatible

with DSP and microcontroller standards.

The device operates with a power supply from 2.3 V to 5.5 V. The

analog and digital sections are independent and can be run from

different power supplies; for example, AVDD can equal 5 V with

DVDD equal to 3 V.

APPLICATIONS

Frequency stimulus/waveform generation

Frequency phase tuning and modulation

Low power RF/communications systems

Liquid and gas flow measurement

Sensory applications: proximity, motion, and defect detection

Test and medical equipment

The AD9838 has a power-down pin (SLEEP) that allows external

control of the power-down mode. Sections of the device that are

not being used can be powered down to minimize current con-

sumption. For example, the DAC can be powered down when

a clock output is being generated.

GENERAL DESCRIPTION

The AD9838 is available in a 20-lead LFCSP_WQ package.

The AD9838 is a low power DDS device capable of producing high

performance sine and triangular outputs. It also has an on-board

comparator that allows a square wave to be produced for clock

generation. Consuming only 11 mW of power at 2.3 V, the

AD9838 is an ideal candidate for power-sensitive applications.

FUNCTIONAL BLOCK DIAGRAM

DVDD CAP/2.5V

AVDD

AGND

DGND

REFOUT FSADJUST

REGULATOR

ON-BOARD

REFERENCE

MCLK

VCC

2.5V

FULL-SCALE

CONTROL

COMP

FSELECT

28-BIT FREQ0

REG

PHASE

ACCUMULATOR

(28-BIT)

IOUT

SIN

ROM

10-BIT

DAC

MUX

IOUTB

28-BIT FREQ1

REG

MSB

12-BIT PHASE0 REG

12-BIT PHASE1 REG

MUX

DIVIDE

BY 2

16-BIT CONTROL

SIGN BIT OUT

VIN

SERIAL INTERFACE

COMPARATOR

AND

CONTROL LOGIC

AD9838

FSYNC

SCLK

SDATA

PSELECT

SLEEP RESET

Figure 1.

Rev. A

Information furnished by Analog Devices is believed to be accurate and reliable. However, no

responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other

rights of third parties that may result from its use. Specifications subject to change without notice. No

license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

Trademarks and registeredtrademarks arethe property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781.329.4700

Fax: 781.461.3113

www.analog.com

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