24-Bit Stereo DAC
Evaluation Board
a
EVAL-AD1852EB
OVERVIEW
an SPI-compatible serial control port. The AD1852 is fully
compatible with all known DVD formats including 96 kHz and
192 kHz sample rates and 24 bits. It also is backwards-compatible
by supporting 50 µs/15 µs digital de-emphasis intended for
“redbook” Compact Discs, as well as de-emphasis at 32 kHz
and 48 kHz sample frequencies.
The EVAL-AD1852-EB evaluation board permits testing and
demonstrating the high-performance AD1852 24-bit stereo
DAC. An input signal is required in either optical or coaxial
SPDIF format or, alternatively, directly via a 10-pin header in
I2S, left justified, right justified, or DSP modes. A second 10-pin
header and DB-9 connector allows control of the internal regis-
ters from an external SPI controller.
The AD1852 has a very simple, but very flexible, serial data
input port that allows for a glueless interconnection to a variety
of ADCs, DSP chips, digital interface receivers (DIR) and
asynchronous sample rate converters (ASRC). The AD1852
can be configured in left-justified (LJ), I2S, right-justified (RJ),
or DSP serial port compatible modes. It can support 16, 20, and
24 bits in all modes. The AD1852 accepts serial audio data in
MSB first, twos complement format. A power-down mode is
offered to minimize power consumption when the device is
inactive. The AD1852 operates from a single 5 V power supply.
It is fabricated on a single monolithic integrated circuit and
housed in a 28-lead SSOP package. Normal operation over the
temperature range 0°C to 70°C is guaranteed.
Power requirements are a clean 9 V to 12 V dc source for the
digital section and a clean 12 V dc for the analog section. The
positive supplies can be paralleled if desired. On-board regulators
derive separate “clean” 5 V dc supplies for the digital and analog
sections. Audio output is provided from two RCA phono jacks.
AD1852 OVERVIEW
The AD1852 is a complete 16-/20-/24-bit single-chip digital
audio, stereo digital-to-analog converter (DAC). It is comprised
of a multibit sigma-delta modulator with dither, continuous
time analog filters, and differential analog outputs. Other fea-
tures include an on-chip stereo attenuator, de-emphasis filter,
selectable interpolator and mute control, programmed through
The AD1852 data sheet gives a more complete description of
operation.
FUNCTIONAL BLOCK DIAGRAM
S5
JP1
INTERFACE INTERPOLATION
MODE
MODE
J2 EXT DATA
J1 RCA JACK
U11
S1
SIGNAL
SOURCE
SELECT
J6
U9B
U9A
LEFT
U3
U4
I/F
U2
DAC
U10
SPDIF INPUT
OPTICAL
DIR
AD1852
MUX
J7
RIGHT
U1
TOS LINK
INPUT
DS3
DEEMPH
DS1
ZERO LEFT
DS4
VERF
DS2
ZERO RIGHT
S3
SPDIF/EXT(J2)
U5
S4
DEEMPHASIS
S2
MUTE
S6
RESET
U8
RESET
GENERATOR
RESET
J3/J5
SPI CONTROL
PORTS
REV. 0
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reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
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© Analog Devices, Inc., 2001