Single-Supply
a
16-Bit ⌺-⌬ Stereo ADC
AD1870*
FUNCTIONAL BLOCK DIAGRAM
FEATURES
Single 5 V Power Supply
Single-Ended Dual-Channel Analog Inputs
92 dB (Typ) Dynamic Range
90 dB (Typ) S/(THD + N)
0.006 dB Decimator Pass-Band Ripple
Fourth Order, 64؋
Oversampling ⌺-⌬ Modulator
Three-Stage, Linear-Phase Decimator
256 ؋
fS or 384 ؋
fS Input Clock
Less than 100 W (Typ) Power-Down Mode
Input Overrange Indication
CLOCK
DIVIDER
LRCK
WCLK
BCLK
1
2
28 CLKIN
SERIAL OUTPUT
INTERFACE
27 TAG
26
25 DV
3
SOUT
THREE-STAGE FIR
DECIMATION
FILTER
THREE-STAGE FIR
DECIMATION
FILTER
4
2
DV
1
DD
DGND2
DD
5
DGND1
RDEDGE
S/M
24
6
23 RESET
22 MSBDLY
21 RLJUST
On-Chip Voltage Reference
Flexible Serial Output Interface
28-Lead SOIC Package
DAC
DAC
DAC
DAC
7
8
384/256
APPLICATIONS
9
20
AV
DD
AGND
Consumer Digital Audio Receivers
Digital Audio Recorders, Including Portables
CD-R, DCC, MD, and DAT
Multimedia and Consumer Electronics Equipment
Sampling Music Synthesizers
10
11
12
V
R
V
L
19
18
17
16
15
IN
IN
CAPR1
CAPR2
AGNDR
CAPL1
CAPL2
AGNDL
SINGLE-TO-
DIFFERENTIAL INPUT DIFFERENTIAL INPUT
CONVERTER CONVERTER
SINGLE-TO-
13
14
VOLTAGE
REFERENCE
V
R
V
L
REF
REF
AD1870
PRODUCT OVERVIEW
The AD1870 is a stereo, 16-bit oversampling ADC based on
sigma-delta (⌺-⌬) technology intended primarily for digital
audio bandwidth applications requiring a single 5 V power supply.
Each single-ended channel consists of a fourth order one-bit
noise shaping modulator and a digital decimation filter. An on-chip
voltage reference, stable over temperature and time, defines the
full-scale range for both channels. Digital output data from both
channels are time multiplexed to a single, flexible serial inter-
face. The AD1870 accepts a 256 × fS or a 384 × fS input clock
(fS is the sampling frequency) and operates in both serial port
Master and Slave Modes. In Slave Mode, all clocks must be ex-
ternally derived from a common source.
shapes the one-bit comparator’s quantization noise out of the
audio pass band. The high order of the modulator randomizes the
modulator output, reducing idle tones in the AD1870 to very
low levels. Because its modulator is single bit, the AD1870 is
inherently monotonic and has no mechanism for producing
differential linearity errors.
The input section of the AD1870 uses autocalibration to correct
any dc offset voltage present in the circuit, provided that the inputs
are ac-coupled. The single-ended dc input voltage can swing
between 0.7 V and 3.8 V typically. The AD1870 antialias input
circuit requires four external 470 pF NPO ceramic chip filter
capacitors, two for each channel. No active electronics are needed.
Decoupling capacitors for the supply and reference pins are
also required.
Input signals are sampled at 64 × fS onto internally buffered
switched capacitors, eliminating external sample-and-hold ampli-
fiers and minimizing the requirements for antialias filtering at the
input. With simplified antialiasing, linear phase can be preserved
across the pass band. The on-chip single-ended-to-differential sig-
nal converters save the board designer from having to provide
them externally. The AD1870’s internal differential architecture
provides increased dynamic range and excellent power supply
rejection characteristics. The AD1870’s proprietary fourth order
differential switched-capacitor ⌺-⌬ modulator architecture
The dual-digital decimation filters are triple-stage, finite impulse
response filters for effectively removing the modulator’s high
frequency quantization noise and reducing the 64 × fS single-bit
output data rate to an fS word rate. They provide linear phase
and a narrow transition band that properly digitizes 20 kHz signals
at a 44.1 kHz sampling frequency. Pass-band ripple is less than
0.006 dB, and stop-band attenuation exceeds 90 dB.
*Protected by U.S. Patent Numbers 5055843, 5126653; others pending.
(Continued on Page 7)
REV. A
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© Analog Devices, Inc., 2002