Datasheet > EVAL-AD1959EB

EVAL-AD1959EB

更新时间： 2024-11-23 22:16:23

品牌	Logo	应用领域
亚德诺 - ADI		/
页数	文件大小	规格书
8页	108K
描述
PLL/Multibit DAC

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中文翻译

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数据手册

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EVAL-AD1959EB 数据手册

PLL/Multibit ꢀ-ꢁ DAC

AD1959

FEATURES

5 V Stereo Audio DAC System

APPLICATIONS

DVD, CD, Home Theater Systems, Automotive Audio

Systems, Sampling Musical Keyboards, Digital Mixing

Consoles, Digital Audio Effects Processors

Accepts 16-Bit/20-Bit/24-Bit Data

Supports 24 Bits, 192 kHz Sample Rate

Accepts a Wide Range of Sample Rates Including:

32 kHz, 44.1 kHz, 48 kHz, 88.2 kHz, 96 kHz, and 192 kHz

Multibit Sigma-Delta Modulator with Data Directed

Scrambling

Single-Ended Output for Easy Application

–94 dB THD + N

108 dB SNR and Dynamic Range

PRODUCT OVERVIEW

The AD1959 is a complete high-performance single-chip stereo

digital audio playback system. It is comprised of a multibit sigma-

delta modulator, digital interpolation filters, and analog output

drive circuitry with an on-board dual PLL clock generator.

Other features include an on-chip stereo attenuator and mute,

programmed through an SPI-compatible serial control port.

The AD1959 is fully compatible with all known DVD formats

including 96 kHz and 192 kHz sample frequencies and 24 bits.

It also is backwards-compatible by supporting 50 µs/15 µs

digital de-emphasis for “redbook” compact discs, as well as

de-emphasis at 32 kHz and 48 kHz sample rates.

75 dB Stopband Attenuation

Clickless Volume Control

Hardware and Software Controllable Clickless Mute

Serial (SPI) Control for: Serial Mode, Number of Bits,

Sample Rate, Volume, Mute, De-Emphasis and

Output Phase

Digital De-Emphasis Processing for 32 kHz, 44.1 kHz,

and 48 kHz Sample Rates

Programmable Dual Fractional-N PLL Clock Generator

27 MHz Master Clock Input/Oscillator

Generated System Clocks

SCLK0: 33.8688 MHz

SCLK1: 384/256 f_S(32 kHz/44.1 kHz/48 kHz/88.2 kHz/

96 kHz)

SCLK2: 512 f_S(32 kHz/44.1 kHz/48 kHz/88.2 kHz/

96 kHz)/22.5792 MHz

Better than 100 ps RMS Clock Jitter

Flexible Serial Data Port with Right-Justified, Left-

Justified, I²S-Compatible, and DSP Serial Port Modes

28-Lead SSOP Plastic Package

The AD1959 has a simple but flexible serial data input port that

allows for glueless interconnection to a variety of ADCs, DSP

chips, AES/EBU receivers, and sample rate converters. The

AD1959 can be configured in left-justified, I²S, right-justified,

or DSP serial-port-compatible modes. It can support 16, 20,

and 24 bits in all modes. The AD1959 accepts serial audio data

in MSB first, two’s-complement format, and operates from a

single 5 V power supply. It is fabricated on a single monolithic

integrated circuit and housed in a 28-lead SSOP package for

operation over the temperature range –40°C to +105°C.

FUNCTIONAL BLOCK DIAGRAM

LOOP

CLOCK

CONTROL DATA

INPUT

FILTERS OUTPUTS

XIN XOUT MCLK

AD1959

PLL

CIRCUIT

SERIAL CONTROL

INTERFACE

VOLTAGE

REFERENCE

OSC

MULTIBIT

SIGMA-DELTA

MODULATOR

8 ꢂ F

INTERPOLATOR

OUTPUT

BUFFER

ATTEN/MUTE

DAC

SERIAL

DATA

INTERFACE

16-/20-/24-

BIT DIGITAL

DATA INPUT

ANALOG

OUTPUTS

MULTIBIT

SIGMA-DELTA

MODULATOR

8 ꢂ F

INTERPOLATOR

OUTPUT

BUFFER

ATTEN/MUTE

DAC

ANALOG SUPPLY

RESET

MUTE

ZERO FLAG

PLL SUPPLY

DIGITAL SUPPLY

REV. 0

Information furnished by Analog Devices is believed to be accurate and

reliable. However, no responsibility is assumed by Analog Devices for its

use, norforanyinfringementsofpatentsorotherrightsofthirdpartiesthat

may result from its use. No license is granted by implication or otherwise

under any patent or patent rights of Analog Devices.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781/329-4700

Fax: 781/326-8703

www.analog.com

12 3 4 5 6 7 8

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