Datasheet > EM68B16CWQH-18H

EM68B16CWQH-18H

更新时间： 2022-02-26 12:34:35

品牌	Logo	应用领域
钰创 - ETRON		动态存储器双倍数据速率
页数	文件大小	规格书
60页	1029K
描述
32M x 16 bit DDRII Synchronous DRAM (SDRAM)

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中文翻译

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数据手册

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EM68B16CWQH-18H 数据手册

EM68B16CWQH

EtronTech

Figure 44. Precharge/precharge-all command to power-down entry

T10

T11

PR or PRA

CMD

CKE

CKE can go to LOW one clock after a Precharge or Precharge all command

t_IS

Figure 45. MRS/EMRS command to power-down entry

T10

T11

MRS or

EMRS

CMD

CKE

t_MRD

t_IS

Figure 46. Asynchronous CKE LOW event

Stable clocks

t_CK

CK#

CKE

t_Delay

t_IS

CKE asynchronously drops LOW

Clocks can be turned off after this point

Figure 47. Clock frequency change in precharge power down mode

Tx+1

Ty+1

Ty+2

Ty+3

Ty+4

CK#

DLL

RESET

CMD

CKE

ODT

NOP

Valid

Frequency Change Occurs here

200 Clocks

t_IS

t_XP

t_RP

t_AOFD

t_IH

ODT is off during DLL RESET

Minimum 2 clocks required before

changing frequency

Stable new clock before power

down exit

Rev. 1.6

Oct. /2015

1...56 57 585960

中文翻译

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