EL2019
®
Data Sheet
December 1995, Rev. G
FN7025
Fast, High Voltage Comparator with
Master Slave Flip-Flop
Features
• Comparator cannot oscillate
The EL2019 offers a new feature
previously unavailable in a comparator
before—a master/slave edge triggered
• Fast response—5ns data to clock setup, 20ns clock to
output
• Wide input differential voltage range—24V on ±15V
supplies
flip-flop. The comparator output will only change output state
after a positive going clock edge is applied. Thus the output
can't feed back to the input and cause oscillation.
Manufactured with Elantec's proprietary Complementary
Bipolar process, this device uses fast PNP and NPN
transistors in the signal path. A unique circuit design gives
the inputs the ability to handle large common mode and
differential mode signals, yet retain high speed and excellent
accuracy. Careful design of the front end insures speed and
accuracy when operating with a mix of small and large
signals. The three-state output stage is designed to be TTL
compatible for any power supply combination, yet it draws a
constant current and does not generate current glitches.
When the output is disabled, the supply current consumption
drops by 50%, but the input stage and master slave flip-flop
remain active.
• Wide input common mode voltage range—±12V
• Precision input stage—V
OS
= 1.5mV
• Low input bias current—100nA
• Low input offset current—30nA
• ±4.5V to ±18V supplies
• Three-State TTL compatible output
• No supply current glitch during switching
• 103dB voltage gain (Low input uncertainty ≈ 30µV)
• 50% power reduction in shut-down mode
• Input and flip-flop remain active in shutdown mode
Ordering Information
Applications
PART NUMBER TEMP. RANGE
PACKAGE
PKG. NO.
• Analog to digital converters
• ATE pin receiver
EL2019CN
-40°C to +85°C
8-Pin PDIP
MDP0006
• Zero crossing detector
• Window detector
Pinout
EL2019
(8-PIN PDIP)
TOP VIEW
• “Go/no-go” detector
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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1
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