Datasheet > EBD52UC8AAFA

EBD52UC8AAFA

更新时间： 2022-12-22 00:38:55

品牌	Logo	应用领域
尔必达 - ELPIDA		动态存储器双倍数据速率
页数	文件大小	规格书
18页	180K
描述
512MB Unbuffered DDR SDRAM DIMM

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EBD52UC8AAFA 数据手册

EBD52UC8AAFA

Electrical Specifications

• All voltages are referenced to VSS (GND).

Absolute Maximum Ratings

Parameter

Symbol

Value

Unit

Note

Voltage on any pin relative to VSS

Supply voltage relative to VSS

Short circuit output current

Power dissipation

–0.5 to +3.6

VDD

IOS

°C

Operating ambient temperature

Storage temperature

0 to +70

–40 to +100

Tstg

Notes: 1. DDR SDRAM component specification.

Caution Exposing the device to stress above those listed in Absolute Maximum Ratings could cause

permanent damage. The device is not meant to be operated under conditions outside the limits

described in the operational section of this specification Exposure to Absolute Maximum Rating

conditions for extended periods may affect device reliability.

DC Operating Conditions (TA = 0 to +70°C) (DDR SDRAM Component Specification)

Parameter

Symbol

VDD,VDDQ

VSS

Min

Typ

2.5

Max

2.7

Unit

Notes

Supply voltage

2.3

Input reference voltage

Termination voltage

Input high voltage

Input low voltage

VREF

0.49 × VDDQ

VREF – 0.04

VREF + 0.15

–0.3

0.50 × VDDQ 0.51 × VDDQ

VTT

VREF

—

VREF + 0.04

VDDQ + 0.3

VREF – 0.15

VIH (DC)

VIL (DC)

—

Input voltage level,

VIN (DC)

VIX (DC)

VID (DC)

–0.3

—

VDDQ + 0.3

CK and /CK inputs

Input differential cross point

voltage, CK and /CK inputs

Input differential voltage,

CK and /CK inputs

0.5 × VDDQ − 0.2V 0.5 × VDDQ

0.36

0.5 × VDDQ + 0.2V

VDDQ + 0.6

—

5, 6

Notes: 1. VDDQ must be lower than or equal to VDD.

2. VIH is allowed to exceed VDD up to 3.6V for the period shorter than or equal to 5ns.

3. VIL is allowed to outreach below VSS down to –1.0V for the period shorter than or equal to 5ns.

4. VIN (DC) specifies the allowable DC execution of each differential input.

5. VID (DC) specifies the input differential voltage required for switching.

6. VIH (CK) min assumed over VREF + 0.18V, VIL (CK) max assumed under VREF – 0.18V

if measurement.

Data Sheet E0362E20 (Ver. 2.0)

1...6 7 8910 11 12...18

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