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E5530H-ZZZ-S8 PDF预览

E5530H-ZZZ-S8

更新时间: 2024-09-15 22:06:03
品牌 Logo 应用领域
爱特美尔 - ATMEL 电信集成电路射频光电二极管信息通信管理
页数 文件大小 规格书
8页 194K
描述
128-bit Read-only IDIC for RF Identification

E5530H-ZZZ-S8 数据手册

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Features  
Low-power, Low-voltage CMOS  
Rectifier, Voltage Limiter, Clock Extraction On-chip (No Battery)  
Small Size  
Factory Laser Programmable ROM  
Operating Temperature Range -40°C to +125°C  
Radio Frequency (RF): 100 kHz to 450 kHz  
Transmission options  
– Code Length: 128, 96, 64, 32 bits  
– Bitrate [bit/s]: RF/8, RF/16, RF/32, RF/40, RF/50, RF/64, RF/80, RF/100, RF/128  
– Modulation: FSK, PSK, BIPH, Manchester, BIPH-FSK  
FDX-B Compatible Coding Possible (ISO 11784/ ISO 11785)  
128-bit  
Read-only  
IDIC for RF  
Identification  
Figure 1. Application  
RF transmitter  
IDIC  
and  
interrogator  
RF  
e5530  
ID  
e5530  
Description  
The e5530 is part of a closed coupled identification system. It receives power from an  
RF transmitter which is coupled inductively to the IDIC . The frequency is typically  
100 kHz to 450 kHz. Receiving RF, the IDIC responds with a data stream by  
damping the incoming RF via an internal load. This damping-in-turn can be detected  
by the interrogator. The identifying data are stored in a 128-bit PROM on the e5530,  
realized as an array of laser-programmable fuses. The logic block diagram for the  
e5530 is shown in figure 2. The data are output bit-serially as a code of length  
128, 96, 64 or 32 bits. The chips are factory-programmed with a unique code.  
Figure 2. Block Diagram  
Analog front end  
Data  
Mod  
Modulator  
FSK  
Load  
PSK  
BIPH  
Manchester  
R7  
R6  
R5  
R4  
R3  
R2  
R1  
R0  
Coil  
128-bit PROM  
Clk  
Clock  
extractor  
Coil  
Column decoder  
Rectifier  
Bitrate  
Counter  
VDD  
VSS  
Rev. 4508BRFID02/02  

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