Datasheet > E5530G-ZZZ-S8

E5530G-ZZZ-S8

更新时间： 2024-11-05 23:49:47

品牌	Logo	应用领域
其他 - ETC		模拟IC
页数	文件大小	规格书
9页	125K
描述
Analog IC

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中文翻译

获取价格

数据手册

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E5530G-ZZZ-S8 数据手册

Features

• Low power, low voltage CMOS

• Rectifier, voltage limiter, clock extraction on-chip (no battery)

• Small size

• Factory laser programmable ROM

• Operating temperature range -40 to +125°C

• Radio Frequency (RF): 100 to 450 kHz

• Transmission options

Code length: 128, 96, 64, 32 bits

Bitrate [bit/s]: RF/8,RF/16, RF/32, RF/40, RF/50, RF/64, RF/80, RF/100, RF/128

Modulation: FSK, PSK, BIPH, Manchester, BIPH-FSK

• DFDX-B compatible coding possible

128-Bit Read-

Only IDIC

for RF

Application

Figure 1.

Identification

RF transmitter

IDIC

and

e5530

interrogator

e5530

Description

The e5530 is part of a closed coupled identification system. It receives power from an

RF transmitter which is coupled inductively to the IDIC . The frequency is typically

100 to 450 kHz. Receiving RF, the IDIC responds with a data stream by damping the

incoming RF via an internal load. This damping-in-turn can be detected by the interro-

gator. The identifying data are stored in a 128 bit PROM on the e5530, realized as an

array of laser-programmable fuses. The logic block diagram for the e5530 is shown in

figure 2. The data are output bit-serially as a code of length 128, 96, 64 or 32 bits. The

chips are factory-programmed with a unique code.

Block Diagram

Figure 2.

Analog front end

Data

Mod

Modulator

FSK

Load

PSK

BIPH

Manchester

Coil

128 bit PROM

Clk

Clock

extractor

Coil

Column decoder

Rectifier

Bitrate

Counter

V_DD

V_SS

Rev. A6, 10-Dec-01

IDIC stands for IDentification Integrated Circuit and is a trademark of Atmel.

1 (9)

12 3 4 5 6 7...9

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