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E5530H-ZZZ-DIT PDF预览

E5530H-ZZZ-DIT

更新时间: 2024-11-05 22:06:03
品牌 Logo 应用领域
TEMIC 电信集成电路射频
页数 文件大小 规格书
5页 75K
描述
128-Bit IDIC for Radio Frequency Identification

E5530H-ZZZ-DIT 技术参数

生命周期:Transferred包装说明:DIE-2
Reach Compliance Code:unknown风险等级:5.6
Is Samacsys:NJESD-30 代码:R-XUUC-N2
负电源额定电压:-2 V功能数量:1
端子数量:2最高工作温度:125 °C
最低工作温度:-40 °C封装主体材料:UNSPECIFIED
封装代码:DIE封装形状:RECTANGULAR
封装形式:UNCASED CHIP认证状态:Not Qualified
表面贴装:YES技术:CMOS
电信集成电路类型:TELECOM CIRCUIT温度等级:AUTOMOTIVE
端子形式:NO LEAD端子位置:UPPER
Base Number Matches:1

E5530H-ZZZ-DIT 数据手册

 浏览型号E5530H-ZZZ-DIT的Datasheet PDF文件第2页浏览型号E5530H-ZZZ-DIT的Datasheet PDF文件第3页浏览型号E5530H-ZZZ-DIT的Datasheet PDF文件第4页浏览型号E5530H-ZZZ-DIT的Datasheet PDF文件第5页 
e5530  
128-Bit IDIC for Radio Frequency Identification  
via an internal load. This damping-in-turn can be detected  
by the interrogator. The identifying data are stored in a  
Description  
The e5530 is part of a closed coupled identification 128 bit PROM on the e5530, realized as an array of laser-  
system. It receives power from an RF transmitter which programmable fuses. The logic block diagram for the  
is coupled inductively to the IDIC . The frequency is e5530 is shown in figure 2. The data are output bit-  
typically 100 to 450 kHz. Receiving RF, the IDIC  
serially as a code of length 128, 96, 64 or 32 bits. The  
responds with a data stream by damping the incoming RF chips are factory-programmed with a unique code.  
Features  
Bitrate [bit/s]:  
RF/8,RF/16, RF/32, RF/40,  
RF/50, RF/64, RF/80, RF/100,  
RF/128, RF/256  
FSK, PSK, BIPH, Manchester  
BIPH-FSK  
Low power, low voltage CMOS  
Rectifier, voltage limiter, clock extraction  
on-chip (no battery)  
Modulation:  
Small size  
Application  
Factory laser programmable ROM  
Operating temperature range –40 to +125°C  
Radio Frequency (RF): 100 to 450 kHz  
RF transmitter  
and  
interrogator  
IDIC  
e5530  
RF  
Transmission options  
95 10318  
Code length: 128, 96, 64, 32 bits  
Figure 1. Application  
Analog front end  
Modulator  
95 10155  
FSK  
Data  
Mod  
Load  
PSK  
BIPH  
Manchester  
R7  
R6  
R5  
R4  
R3  
R2  
R1  
R0  
Coil  
128 bit PROM  
Clk  
Clock  
extractor  
Coil  
Column decoder  
Rectifier  
Bitrate  
Counter  
V
DD  
V
SS  
Figure 2. Block diagram  
IDIC stands for IDentification Integrated Circuit and is a trademark of TEMIC.  
Rev. A3, 17-Sep-98  
1 (5)  

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