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DTD113ERL1 PDF预览

DTD113ERL1

更新时间: 2024-11-18 14:49:11
品牌 Logo 应用领域
安森美 - ONSEMI 开关晶体管
页数 文件大小 规格书
8页 171K
描述
100mA, 50V, NPN, Si, SMALL SIGNAL TRANSISTOR, TO-92, TO-226, 3 PIN

DTD113ERL1 技术参数

是否Rohs认证:不符合生命周期:Obsolete
零件包装代码:TO-92包装说明:CYLINDRICAL, O-PBCY-T3
针数:3Reach Compliance Code:compliant
ECCN代码:EAR99风险等级:5.67
Is Samacsys:N其他特性:BUILT IN BIAS RESISTOR RATIO IS 1, EUROPEAN PART NUMBER
最大集电极电流 (IC):0.1 A集电极-发射极最大电压:50 V
配置:SINGLE WITH BUILT-IN RESISTOR最小直流电流增益 (hFE):3
JEDEC-95代码:TO-92JESD-30 代码:O-PBCY-T3
JESD-609代码:e0元件数量:1
端子数量:3最高工作温度:150 °C
封装主体材料:PLASTIC/EPOXY封装形状:ROUND
封装形式:CYLINDRICAL峰值回流温度(摄氏度):225
极性/信道类型:NPN认证状态:Not Qualified
表面贴装:NO端子面层:TIN LEAD
端子形式:THROUGH-HOLE端子位置:BOTTOM
处于峰值回流温度下的最长时间:NOT SPECIFIED晶体管应用:SWITCHING
晶体管元件材料:SILICONBase Number Matches:1

DTD113ERL1 数据手册

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DTC114E Series  
Preferred Devices  
Bias Resistor Transistor  
NPN Silicon Surface Mount Transistor  
with Monolithic Bias Resistor Network  
This new series of digital transistors is designed to replace a single  
device and its external resistor bias network. The BRT (Bias Resistor  
Transistor) contains a single transistor with a monolithic bias network  
consisting of two resistors; a series base resistor and a base–emitter  
resistor. The BRT eliminates these individual components by  
integrating them into a single device. The use of a BRT can reduce  
both system cost and board space. The device is housed in the TO–92  
package which is designed for through hole applications.  
http://onsemi.com  
NPN SILICON  
BIAS RESISTOR  
TRANSISTOR  
PIN 3  
COLLECTOR  
(OUTPUT)  
MAXIMUM RATINGS (T = 25°C unless otherwise noted)  
A
Rating  
Collector-Base Voltage  
Collector-Emitter Voltage  
Collector Current  
Symbol  
Value  
50  
Unit  
Vdc  
R1  
R2  
V
CBO  
PIN 2  
BASE  
(INPUT)  
V
CEO  
50  
Vdc  
PIN 1  
EMITTER  
(GROUND)  
I
C
100  
mAdc  
Total Power Dissipation  
P
D
@ T = 25°C (Note 1.)  
350  
mW  
A
Derate above 25°C  
2.81  
mW/°C  
THERMAL CHARACTERISTICS  
Characteristic  
Symbol  
Value  
Unit  
Thermal Resistance, Junction to  
Ambient (surface mounted)  
R
357  
°C/W  
θ
JA  
1
2
Operating and Storage  
Temperature Range  
T , T  
–55 to  
+150  
°C  
J
stg  
3
CASE 29  
TO–92 (TO–226)  
STYLE 1  
Maximum Temperature for  
Soldering Purposes,  
Time in Solder Bath  
T
L
260  
10  
°C  
Sec  
DEVICE MARKING AND RESISTOR VALUES  
MARKING DIAGRAM  
Device  
Marking  
R1 (K)  
R2 (K)  
Shipping  
5000/Box  
DTC114E  
DTC124E  
DTC144E  
DTC114Y  
DTC114T  
DTC143T  
DTD113E  
DTC123E  
DTC143E  
DTC143Z  
DTC114E  
DTC124E  
DTC144E  
DTC114Y  
DTC114T  
DTC143T  
DTD113E  
DTC123E  
DTC143E  
DTC143Z  
10  
22  
47  
10  
10  
4.7  
1.0  
2.2  
4.7  
4.7  
10  
22  
47  
47  
DTC1xxx  
YWW  
1.0  
2.2  
4.7  
47  
DTC1 = Specific Device Code  
xxx  
Y
WW  
= (See Table)  
= Year  
= Work Week  
1. Device mounted on a FR–4 glass epoxy printed circuit board using the  
minimum recommended footprint.  
Preferred devices are recommended choices for future use  
and best overall value.  
Semiconductor Components Industries, LLC, 2001  
402  
Publication Order Number:  
January, 2001 – Rev. 2  
DTC114E/D  

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