Datasheet > DSS4320T

DSS4320T

更新时间： 2024-09-19 09:57:47

品牌	Logo	应用领域
美台 - DIODES		晶体晶体管
页数	文件大小	规格书
5页	112K
描述
LOW VCE(SAT) NPN SURFACE MOUNT TRANSISTOR

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中文翻译

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DSS4320T 数据手册

DSS4320T

LOW V_CE(SAT)NPN SURFACE MOUNT TRANSISTOR

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Mechanical Data

Features

•

Epitaxial Planar Die Construction

•

Case: SOT-23

Ideal for Medium Power Amplification and Switching

Complimentary PNP Type Available (DSS5320T)

Lead Free By Design/RoHS Compliant (Note 1)

“Green” Device (Note 2)

Case Material: Molded Plastic, "Green” Molding Compound. UL

Flammability Classification Rating 94V-0

Moisture Sensitivity: Level 1 per J-STD-020D

Terminals: Finish — Matte Tin annealed over Copper leadframe.

Solderable per MIL-STD-202, Method 208

•

Marking Information: See Page 4

Ordering Information: See Page 4

Weight: 0.008 grams (approximate)

Top View

Device Schematic

Maximum Ratings @T_A= 25°C unless otherwise specified

Characteristic

Collector-Base Voltage

Collector-Emitter Voltage

Emitter-Base Voltage

Symbol

V_CBO

V_CEO

V_EBO

I_CM

Value

Unit

Peak Pulse Current

Repetitive Peak Pulse Current (Note 3)

Continuous Collector Current

Base Current

0.5

I_CRP

I_C

I_B

Thermal Characteristics

Characteristic

Symbol

P_D

R_θ

Value

600

Unit

°C/W

°C

Power Dissipation (Note 4) @ T_A= 25°C

209

Thermal Resistance, Junction to Ambient Air (Note 4) @ T_A= 25°C

Operating and Storage Temperature Range

-55 to +150

T_J, T_STG

Notes:

1. No purposefully added lead.

2. Diodes Inc.'s "Green" policy can be found on our website at http://www.diodes.com/products/lead_free/index.php.

3. Operated under pulse conditions: Pulse width ≤ 100ms, duty cycle ≤ 0.25.

4. Device mounted on FR-4 PCB; with minimum recommended pad layout.

1 of 5

www.diodes.com

November 2008

DSS4320T

Document number: DS31621 Rev. 2 - 2

12 3 4 5

中文翻译

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