Datasheet > DS90CR214MTD

DS90CR214MTD

更新时间： 2024-11-20 22:50:51

品牌	Logo	应用领域
美国国家半导体 - NSC		/
页数	文件大小	规格书
14页	267K
描述
21-Bit Channel LinkΑ66 MHz

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DS90CR214MTD 数据手册

July 1997

DS90CR213/DS90CR214

21-Bit Channel Link—66 MHz

width, which provides a system cost savings, reduces con-

nector physical size and cost, and reduces shielding require-

ments due to the cable’s smaller form factor.

General Description

The DS90CR213 transmitter converts 21 bits of CMOS/TTL

data into three LVDS (Low Voltage Differential Signaling)

data streams. A phase-locked transmit clock is transmitted in

parallel with the data streams over a fourth LVDS link. Every

cycle of the transmit clock 21 bits of input data are sampled

and transmitted. The DS90CR214 receiver converts the

LVDS data streams back into 21 bits of CMOS/TTL data. At

a transmit clock frequency of 66 MHz, 21 bits of TTL data are

transmitted at a rate of 462 Mbps per LVDS data channel.

Using a 66 MHz clock, the data throughput is 1.386 Gbit/s

(173 Mbytes/s).

The 21 CMOS/TTL inputs can support a variety of signal

combinations. For example, 5 4-bit nibbles (byte + parity) or

2 9-bit (byte + 3 parity) and 1 control.

Features

n 66 MHz Clock Support

n Up to 173 Mbytes/s bandwidth

n Low power CMOS design ( 610 mW)

n Power-down mode ( 0.5 mW total)

The multiplexing of the data lines provides a substantial

cable reduction. Long distance parallel single-ended buses

typically require a ground wire per active signal (and have

very limited noise rejection capability). Thus, for a 21-bit wide

data and one clock, up to 44 conductors are required. With

the Channel Link chipset as few as 9 conductors (3 data

pairs, 1 clock pair and a minimum of one ground) are

needed. This provides an 80% reduction in required cable

n Up to 1.386 Gbit/s data throughput

n Narrow bus reduces cable size and cost

n 290 mV swing LVDS devices for low EMI

n PLL requires no external components

n Low profile 48-lead TSSOP package

n Rising edge data strobe

n Compatible with TIA/EIA-644 LVDS Standard

Block Diagrams

DS90CR213

DS90CR214

DS012888-27

DS012888-1

Order Number DS90CR213MTD

See NS Package Number MTD48

Order Number DS90CR214MTD

See NS Package Number MTD48

TRI-STATE^®is a registered trademark of National Semiconductor Corporation.

DS012888

www.national.com

PrintDate=1998/01/07 PrintTime=09:53:21 28561 ds012888 Rev. No. 5 cmserv Proof

12 3 4 5 6 7...14

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与DS90CR214MTD相关器件

型号	品牌	获取价格	描述	数据表
DS90CR214MTD/NOPB	TI	获取价格	TRIPLE LINE RECEIVER, PDSO48, PLASTIC, TSSOP-48
DS90CR214MTD/NOPB	ROCHESTER	获取价格	TRIPLE LINE RECEIVER, PDSO48, PLASTIC, TSSOP-48
DS90CR214MTDX	ROCHESTER	获取价格	TRIPLE LINE RECEIVER, PDSO48, PLASTIC, TSSOP-48
DS90CR214MTDX	TI	获取价格	TRIPLE LINE RECEIVER, PDSO48, PLASTIC, TSSOP-48
DS90CR214MTDX/NOPB	TI	获取价格	TRIPLE LINE RECEIVER, PDSO48, PLASTIC, TSSOP-48
DS90CR215	NSC	获取价格	+3.3V Rising Edge Data Strobe LVDS 21-Bit Channel Link - 66 MHz
DS90CR215	TI	获取价格	3.3V Rising Edge Data Strobe LVDS 21-Bit Channel Link - 66 MHz
DS90CR215_09	NSC	获取价格	+3.3V Rising Edge Data Strobe LVDS 21-Bit Channel Link-66 MHz
DS90CR215_15	TI	获取价格	3.3V Rising Edge Data Strobe LVDS 21-Bit Channel Link - 66 MHz
DS90CR215MTD	NSC	获取价格	+3.3V Rising Edge Data Strobe LVDS 21-Bit Channel Link - 66 MHz

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