Datasheet > DS90CR215_15

DS90CR215_15

更新时间： 2024-11-22 02:58:19

品牌	Logo	应用领域
德州仪器 - TI		/
页数	文件大小	规格书
23页	1109K
描述
3.3V Rising Edge Data Strobe LVDS 21-Bit Channel Link - 66 MHz

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DS90CR215_15 数据手册

DS90CR215, DS90CR216

www.ti.com

SNLS129D –MARCH 1999–REVISED APRIL 2013

DS90CR215/DS90CR216 +3.3V Rising Edge Data Strobe LVDS

21-Bit Channel Link - 66 MHz

Check for Samples: DS90CR215, DS90CR216

FEATURES

DESCRIPTION

The DS90CR215 transmitter converts 21 bits of

•

Single +3.3V Supply

CMOS/TTL data into three LVDS (Low Voltage

Differential Signaling) data streams. A phase-locked

transmit clock is transmitted in parallel with the data

streams over a fourth LVDS link. Every cycle of the

transmit clock 21 bits of input data are sampled and

transmitted. The DS90CR216 receiver converts the

LVDS data streams back into 21 bits of CMOS/TTL

data. At a transmit clock frequency of 66 MHz, 21 bits

of TTL data are transmitted at a rate of 462 Mbps per

LVDS data channel. Using a 66 MHz clock, the data

throughput is 1.386 Gbit/s (173 Mbytes/s).

Chipset (Tx + Rx) Power Consumption <250

mW (typ)

•

Power-down Mode (<0.5 mW total)

Up to 173 Megabytes/sec Bandwidth

Up to 1.386 Gbps Data Throughput

Narrow Bus Reduces Cable Size

290 mV Swing LVDS Devices for Low EMI

+1V Common Mode Range (Around +1.2V)

PLL Requires No External Components

Low Profile 48-Lead TSSOP Package

Rising Edge Data Strobe

The multiplexing of the data lines provides

substantial cable reduction. Long distance parallel

single-ended buses typically require a ground wire

per active signal (and have very limited noise

rejection capability). Thus, for a 21-bit wide data and

one clock, up to 44 conductors are required. With the

Channel Link chipset as few as 9 conductors (3 data

pairs, 1 clock pair and a minimum of one ground) are

needed. This provides a 80% reduction in required

cable width, which provides a system cost savings,

reduces connector physical size and cost, and

reduces shielding requirements due to the cables'

smaller form factor.

Compatible with TIA/EIA-644 LVDS Standard

ESD Rating > 7 kV

Operating Temperature: −40°C to +85°C

The 21 CMOS/TTL inputs can support a variety of

signal combinations. For example, five 4-bit nibbles

plus 1 control, or two 9-bit (byte + parity) and 3

control.

Block Diagram

Figure 1. DS90CR215

48-Lead TSSOP

See Package Number DGG0048A

Figure 2. DS90CR216 - Improved AC Specifications

See Package Number DGG0048A

Recommended Alternative Device

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

All trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

12 3 4 5 6 7...23

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与DS90CR215_15相关器件

型号	品牌	获取价格	描述	数据表
DS90CR215MTD	NSC	获取价格	+3.3V Rising Edge Data Strobe LVDS 21-Bit Channel Link - 66 MHz
DS90CR215MTD	TI	获取价格	DS90CR215/DS90CR216 3.3V Rising Edge Data Strobe LVDS 21-Bit Channel Link - 66 MHz
DS90CR215MTD/NOPB	TI	获取价格	DS90CR215/DS90CR216 3.3V Rising Edge Data Strobe LVDS 21-Bit Channel Link - 66 MHz
DS90CR215MTD/NOPB	NSC	获取价格	IC LINE DRIVER, PDSO48, LOW PROFILE, PLASTIC, TSSOP-48, Line Driver or Receiver
DS90CR215MTDX	NSC	获取价格	IC TRIPLE LINE DRIVER, PDSO48, LOW PROFILE, TSSOP-48, Line Driver or Receiver
DS90CR215MTDX/NOPB	TI	获取价格	DS90CR215/DS90CR216 3.3V Rising Edge Data Strobe LVDS 21-Bit Channel Link - 66 MHz
DS90CR215MTDX/NOPB	NSC	获取价格	IC LINE DRIVER, PDSO48, LOW PROFILE, PLASTIC, TSSOP-48, Line Driver or Receiver
DS90CR216	TI	获取价格	3.3V Rising Edge Data Strobe LVDS 21-Bit Channel Link - 66 MHz
DS90CR216A	NSC	获取价格	+3.3V Rising Edge Data Strobe LVDS Receiver 28-Bit Channel Link-66 MHz, +3.3V Rising Edge
DS90CR216A	TI	获取价格	+3.3V 上升沿数据选通 LVDS 接收器 21 位频道链接 - 66MHz

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