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DS90CF582MTD PDF预览

DS90CF582MTD

更新时间: 2024-11-04 22:40:11
品牌 Logo 应用领域
美国国家半导体 - NSC 显示器光电二极管
页数 文件大小 规格书
12页 216K
描述
LVDS 24-Bit Color Flat Panel Display (FPD) Link

DS90CF582MTD 数据手册

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April 1996  
DS90CF581/DS90CF582  
LVDS 24-Bit Color Flat Panel Display (FPD) Link  
General Description  
Features  
Y
Up to 140 Megabyte/sec Bandwidth  
The DS90CF581 transmitter converts 28 bits of CMOS/TTL  
data into four LVDS (Low Voltage Differential Signaling)  
data streams. A phase-locked transmit clock is transmitted  
in parallel with the data streams over a fifth LVDS link. Every  
cycle of the transmit clock 28 bits of input data are sampled  
and transmitted. The DS90CF582 receiver converts the  
LVDS data streams back into 28 bits of CMOS/TTL data. At  
a transmit clock frequency of 40 MHz, 24 bits of RGB data  
Y
Narrow bus reduces cable size  
Y
345 mV swing LVDS devices for low EMI  
Y
Low power CMOS design  
Y
Power-down mode  
Y
PLL requires no external components  
Y
Low profile 56-lead TSSOP package  
Y
Falling edge data strobe  
and  
4
FPFRAME, DRDY, CNTL) are transmitted at  
bits of LCD timing and control data (FPLINE,  
rate of  
Y
Compatible with TIA/EIA-644 LVDS standard  
a
280 Mbps per LVDS data channel. Using a 40 MHz clock,  
the data throughput is 140 Megabytes per second. The  
chipset is an ideal means to solve EMI and cable size prob-  
lems associated with wide, high speed TTL interfaces.  
Block Diagrams  
DS90CF581  
DS90CF582  
TL/F/12486–1  
Order Number DS90CF581MTD  
See NS Package Number MTD56  
Order Number DS90CF582MTD  
See NS Package Number MTD56  
Application  
TL/F/12486–2  
TRI-STATEÉ is a registered trademark of National Semiconductor Corporation.  
C
1996 National Semiconductor Corporation  
TL/F/12486  
RRD-B30M66/Printed in U. S. A.  

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