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DS150DF1610

更新时间: 2024-11-13 11:11:19
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德州仪器 - TI /
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5页 116K
描述
12.5 至 15Gbps 16 通道重定时器

DS150DF1610 数据手册

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DS150DF1610  
SNLS490 NOVEMBER 2014  
DS150DF1610 12.5 to 15 Gbps 16-Channel Retimer  
1 Features  
3 Description  
The DS150DF1610 is a sixteen-channel multi-rate  
retimer with integrated signal conditioning features.  
The device includes a fully adaptive Continuous Time  
Linear Equalizer (CTLE), Decision Feedback  
Equalizer (DFE), clock and data recovery (CDR), and  
a transmit FIR filter to enhance the reach and  
robustness over long, lossy, crosstalk impaired high  
1
Pin-Compatible Family  
DS150DF1610: 12.5 to 15G  
DS125DF1610: 9.8 to 12.5G  
DS110DF1610: 8.5 to 11.3G  
Fully Adaptive CTLE  
speed serial links to achieve BER < 1×10-15  
.
Self tuning DFE, with Optional Continuous  
Adaption  
Each channel of the DS150DF1610 independently  
locks to serial data rates between 12.5 and 15 Gbps  
plus the divide by 2, 4 and 8 sub-multiples. A simple  
external oscillator (±100ppm) that is synchronous or  
asynchronous with the incoming data stream is used  
as a calibration clock.  
Configurable VGA  
Adjustable Transmit VOD  
Adjustable 3-tap Transmit FIR Filter  
On-chip AC Coupling on Receive Inputs  
Locks to Half/Quarter/Eighth Data Rates for  
Legacy Support  
A programmable transmit Finite Impulse Response  
(FIR) filter offers control of the pre-cursor, main tap  
and post-cursor for transmit equalization. The fully  
adaptive receive equalization (CTLE and DFE)  
enables longer distance transmission in lossy copper  
On-chip Eye Monitor(EOM), PRBS Checker,  
Pattern Generator  
Supports JTAG Boundary Scan  
interconnects  
connectors.  
and  
backplanes  
with  
multiple  
Programmable Output Polarity Inversion  
Input Signal Detection, CDR Lock Detection  
Single 2.5 V ±5% Power Supply  
A non-disruptive mission mode eye-monitor feature  
allows link monitoring internal to the receiver. The  
built-in PRBS generator and checker compliment the  
internal diagnostic features to complete standalone  
BERT measurements. Built-in JTAG enables  
manufacturing tests.  
SMBus Based Register Configuration  
Optional EEPROM Configuration  
15 mm x 15 mm, 196-pin FCBGA Package  
Operating Temp Range : –10°C to +85°C  
To download the full datasheet, please send a  
request to: highspeed_datasheets@list.ti.com  
2 Applications  
Backplane/Midplane reach extension  
Device Information(1)  
PART NUMBER  
PACKAGE  
BODY SIZE NOM  
DS150DF1610  
FCBGA (196)  
15.00 mm x 15.00 mm  
(1) For all available packages, see the orderable addendum at  
the end of the datasheet  
DS150DF1610  
100nF  
RX_0_0P  
TX_0_0P  
RX_0_0N  
TX_0_0N  
.
.
.
.
.
.
.
.
.
.
.
.
100nF  
100nF  
2.5V or 3.3V  
RX_1_7P  
RX_1_7N  
TX_1_7P  
TX_1_7N  
__________  
2k:  
2k:  
2k:  
2k:  
100nF  
TDI_IO  
INTERR_IO  
_________  
TDO_IO  
TRST_IO  
TMS_IO  
TCK_IO  
RESET_IO  
SDA_IO  
SCL_IO  
1F  
1F  
312.5 MHz  
CLK_MON_P  
CLK_MON_N  
EN_SMB  
READ_EN  
ADDR0  
REF_CLK_P  
REF_CLK_N  
2.5V  
22F  
(1x)  
0.1F  
(8x)  
VDD  
GND  
ADDR1  
1k:  
1k:  
1k:  
1k:  
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,  
intellectual property matters and other important disclaimers. PRODUCT PREVIEW Information. Product in design phase of  
development. Subject to change or discontinuance without notice.  
 

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