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DS1395

更新时间: 2024-09-12 22:50:47
品牌 Logo 应用领域
达拉斯 - DALLAS 计时器或实时时钟微控制器和处理器外围集成电路静态存储器光电二极管双倍数据速率
页数 文件大小 规格书
19页 197K
描述
RAMified Real Time Clock

DS1395 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
Reach Compliance Code:unknown风险等级:5.92
Is Samacsys:N其他特性:DAYLIGHT SAVINGS OPTION; PAGE ACCESS FOR 4K X 8 SRAM WITH 32 BYTE EXTENDED RAM; STANDBY I/P
外部数据总线宽度:8信息访问方法:PARALLEL, DIRECT ADDRESS
中断能力:YJESD-30 代码:R-PDIP-T28
JESD-609代码:e0端子数量:28
计时器数量:1片上数据RAM宽度:8
最高工作温度:70 °C最低工作温度:
最大输出时钟频率:0.008192 MHz封装主体材料:PLASTIC/EPOXY
封装代码:DIP封装等效代码:DIP28,.6
封装形状:RECTANGULAR封装形式:IN-LINE
电源:5 V认证状态:Not Qualified
RAM(字数):4146子类别:Timer or RTC
最大压摆率:50 mA最大供电电压:5.5 V
最小供电电压:4.5 V标称供电电压:5 V
表面贴装:NO技术:CMOS
温度等级:COMMERCIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL最短时间:SECONDS
易失性:YESuPs/uCs/外围集成电路类型:TIMER, REAL TIME CLOCK
Base Number Matches:1

DS1395 数据手册

 浏览型号DS1395的Datasheet PDF文件第2页浏览型号DS1395的Datasheet PDF文件第3页浏览型号DS1395的Datasheet PDF文件第4页浏览型号DS1395的Datasheet PDF文件第5页浏览型号DS1395的Datasheet PDF文件第6页浏览型号DS1395的Datasheet PDF文件第7页 
DS1395/DS1397  
DS1395/DS1397  
RAMified Real Time Clock  
FEATURES  
PIN ASSIGNMENT  
Ideal for EISA bus PCs  
A0  
1
A2  
A3  
V
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
2
3
4
A1  
X2  
Functionally compatible with MC146818 in 32 KHz  
mode  
DD  
X1  
SQW  
A4  
STBY  
5
6
Totally nonvolatile with over 10 years of operation in  
the absence of power  
D0  
D1  
D2  
D3  
D4  
D5  
D6  
D7  
A5  
7
V
BAT  
8
IRQ  
Self-contained subsystem includes lithium, quartz,  
and support circuitry  
9
RESET  
RD  
10  
11  
12  
13  
B
GND  
Counts seconds, minutes, hours, day of the week,  
date, month, and year with leap year compensation  
WR  
XRAM  
RTC  
V
14  
SS  
Binary or BCD representations of time, calendar, and  
alarm  
DS1395S 28-Pin SOIC (330 mil)  
1
2
3
A0  
A1  
A2  
A3  
V
28  
27  
26  
12- or 24-hour clock with AM and PM in 12-hour mode  
Daylight Savings Time option  
X2  
DD  
4
5
6
7
X1  
SQW  
A4  
25  
24  
Interfacedwith software as 64 register/RAM locations  
plus 4K x 8 of static RAM  
STBY  
D0  
A5  
23  
22  
21  
20  
19  
18  
17  
16  
15  
14 bytes of clock and control registers  
50 bytes of general and control registers  
Separate 4K x 8 nonvolatile SRAM  
V
D1  
D2  
D3  
BAT  
8
IRQ  
9
RESET  
RD  
10  
11  
12  
13  
14  
D4  
Programmable square wave output signal  
Bus-compatible interrupt signals (IRQ)  
B
D5  
D6  
D7  
GND  
WR  
XRAM  
RTC  
V
SS  
Three interrupts are separately software-maskable  
and testable:  
DS1395 28-Pin DIP (600 mil)  
Time-of-day alarm once/second to once/day  
Periodic rates from 122 µs to 500 ms  
End-of-clock update cycle  
1
A0  
A1  
28 A2  
2
A3  
V
27  
26  
3
NC  
NC  
DD  
4
SQW  
A4  
25  
24  
23  
28-pin JEDEC footprint  
5
STBY  
D0  
6
A5  
Available as chip (DS1395/DS1395S) or stand alone  
module with embedded lithium battery and crystal  
(DS1397)  
D1  
NC  
7
22  
21  
20  
19  
D2  
IRQ  
RESET  
RD  
8
D3  
D4  
D5  
D6  
D7  
9
10  
11  
12  
13  
14  
ORDERING INFORMATION  
NC  
18  
17  
DS1395  
DS1395S  
DS1397  
RTC Chip; 28–pin DIP  
RTC Chip; 28–pin SOIC  
RTC Module; 28–pin DIP  
WR  
XRAM  
RTC  
16  
15  
V
SS  
DS1397 28-Pin Encapsulated Package (720 mil)  
ECopyright 1995 by Dallas Semiconductor Corporation.  
All Rights Reserved. For important information regarding  
patents and other intellectual property rights, please refer to  
Dallas Semiconductor databooks.  
020794 1/19  

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