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DRA3A23J0L PDF预览

DRA3A23J0L

更新时间： 2024-11-21 21:05:39
品牌 Logo 应用领域
松下 - PANASONIC 开关光电二极管晶体管
页数 文件大小 规格书
3页 315K
描述
Small Signal Bipolar Transistor, 0.08A I(C), 50V V(BR)CEO, 1-Element, PNP, Silicon, HALOGEN FREE, SSSMINI3-F2-B, 3 PIN

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DRA3A23J0L 技术参数

生命周期：Active包装说明：SMALL OUTLINE, R-PDSO-F3
Reach Compliance Code：unknownECCN代码：EAR99
HTS代码：8541.21.00.95风险等级：5.75
其他特性：BUILT IN BIAS RESISTOR RATIO IS 21.36最大集电极电流 (IC)：0.08 A
集电极-发射极最大电压：50 V配置：SINGLE WITH BUILT-IN RESISTOR
最小直流电流增益 (hFE)：80JESD-30 代码：R-PDSO-F3
元件数量：1端子数量：3
封装主体材料：PLASTIC/EPOXY封装形状：RECTANGULAR
封装形式：SMALL OUTLINE极性/信道类型：PNP
表面贴装：YES端子形式：FLAT
端子位置：DUAL晶体管应用：SWITCHING
晶体管元件材料：SILICONBase Number Matches：1

DRA3A23J0L 数据手册

 浏览型号DRA3A23J0L的Datasheet PDF文件第2页浏览型号DRA3A23J0L的Datasheet PDF文件第3页 
DRA3A23J  
Silicon PNP epitaxial planar type  
For digital circuits  
Complementary to DRC3A23J  
DRA9A23J in SSSMini3 type package  
ꢀPackage  
Features  
ꢀCode  
Low collector-emitter saturation voltage VCE(sat)  
Contributes to miniaturization of sets, reduction of component count.  
Eco-friendly Halogen-free package  
SSSMini3-F2-B  
ꢀPin Name  
1: Base  
2: Emitter  
Packaging  
3: Collector  
Embossed type (Thermo-compression sealing): 10000 pcs / reel (standard)  
ꢀMarking Symbol: G6  
ꢀInternal Connection  
ꢀAbsolute Maximum Ratings T = 25°C  
a
Parameter  
Collector-base voltage (Emitter open)  
Collector-emitter voltage (Base open)  
Collector current  
Symbol  
VCBO  
VCEO  
IC  
Rating  
–50  
Unit  
V
C
E
R1  
B
–50  
V
R2  
–80  
mA  
mW  
°C  
Total power dissipation  
PT  
100  
R1  
R2  
2.2  
47  
kΩ  
kΩ  
Resistance value  
Junction temperature  
Tj  
150  
Storage temperature  
T
stg  
–55 to +150  
°C  
ꢀElectrical Characteristics T = 25°C±3°C  
a
Parameter  
Symbol  
Conditions  
Min  
–50  
–50  
Typ  
Max  
Unit  
Collector-base voltage (Emitter open)  
Collector-emitter voltage (Base open)  
Collector-base cutoff current (Emitter open)  
Collector-emitter cutoff current (Base open)  
Emitter-base cutoff current (Collector open)  
Forward current transfer ratio  
Collector-emitter saturation voltage  
Input voltage (ON)  
VCBO IC = –10 µA, IE = 0  
VCEO IC = –2 mA, IB = 0  
V
V
ICBO  
ICEO  
IEBO  
hFE  
VCB = –50 V, IE = 0  
VCE = –50 V, IB = 0  
VEB = –6 V, IC = 0  
– 0.1  
– 0.5  
– 0.2  
µA  
µA  
mA  
V
VCE = –10 V, IC = –5 mA  
80  
VCE(sat) IC = –10 mA, IB = – 0.5 mA  
VI(on) VCE = – 0.2 V, IC = –5 mA  
– 0.25  
–1.2  
V
Input voltage (OFF)  
VI(off) VCE = –5 V, IC = –100 µA  
– 0.4  
+30%  
0.057  
V
Input resistance  
R1  
–30%  
0.037  
2.2  
kΩ  
Resistance ratio  
R1 / R2  
0.047  
Note) Measuring methods are based on JAPANESE INDUSTRIAL STANDARD JIS C 7030 measuring methods for transistors.  
Publication date: April 2011  
Ver. AED  
1
123

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