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DP8496VF

更新时间: 2024-12-01 19:55:47
品牌 Logo 应用领域
美国国家半导体 - NSC /
页数 文件大小 规格书
92页 1088K
描述
IC,DISK CONTROLLER,CMOS,QFP,100PIN

DP8496VF 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:QFP, QFP100,.7X.9Reach Compliance Code:unknown
风险等级:5.92JESD-30 代码:R-PQFP-G100
JESD-609代码:e0端子数量:100
最高工作温度:70 °C最低工作温度:
封装主体材料:PLASTIC/EPOXY封装代码:QFP
封装等效代码:QFP100,.7X.9封装形状:RECTANGULAR
封装形式:FLATPACK电源:5 V
认证状态:Not Qualified子类别:Secondary Storage Controllers
最大压摆率:50 mA标称供电电压:5 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING端子节距:0.635 mm
端子位置:QUADBase Number Matches:1

DP8496VF 数据手册

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PRELIMINARY  
December 1991  
DP8496/DP8497  
SCSI-2 Disk Data Controller  
General Description  
The DP8496/7 is a highly integrated, high-performance  
Features  
Y
High disk data rates:  
Ð DP8496/7-33 33 Mbit/sec  
Ð DP8496/7-50 50 Mbit/sec  
CMOS SCSI disk data controller. It is designed for use in-  
side intelligent hard disk drives that utilize the Small Com-  
puter System Interface (SCSI) standard. It can also be used  
in ESDI, SMD and ST506 bridging controller applications.  
The DP8496/7 includes most of the data path functions  
needed to implement a complete hard disk controller. It in-  
cludes a full featured SCSI Bus Controller, Buffer Memory  
Interface with pipelined pointers, fast Disk Data Controller,  
and a Processor Interface.  
Y
Synchronous SCSI-2 transfer rates up to 10 MByte/sec  
with offset up to 16 (Fast option)  
Y
Y
Asynchronous SCSI transfer rates up to 5 MByte/sec  
Support for Fast Page Mode and Static Column De-  
code type DRAMs  
Y
Y
Y
Attains sustained buffer bandwidths above 9 MByte/sec  
with byte-wide memory configuration  
With the addition of National Semiconductor read-channel  
chips such as a PLL Synchronizer, and Encoder/Decoder, a  
pulse detector, and a head amplifier, complete data-path  
electronics of a SCSI drive can be implemented. A micro-  
controller, such as National’s HPCTM, may be used to man-  
age the SCSI commands and the drive specific control sig-  
nals. The high level of intelligence implemented on the  
DP8496/7 means lower overhead for the disk-drive’s em-  
bedded microcontroller, making possible a high-perform-  
ance design employing only one micro-controller.  
Word-wide buffer memory port allows sustained band-  
widths of 17 MByte/sec  
Buffer memory up to  
SRAM  
4 MBytes DRAM or 1 MByte  
Y
Y
Y
On-chip DMA with buffered pointer addresses  
Multi-phase type SCSI commands  
Parity error checking on SCSI, buffer memory, and all  
internal data paths  
Y
Y
Y
Programmable format and sectoring modes including  
soft, pseudo-hard, and hard  
The DP8496 provides on-chip single-ended transceivers for  
driving the SCSI bus. The DP8497 provides all control sig-  
nals necessary for direct interfacing with differential trans-  
ceivers recommended for Fast SCSI option of SCSI-2.  
32, 48 or 56-bit computer generated ECC with on-chip  
correction  
On-chip single-ended transceivers on DP8496. DP8497  
interfaces directly with differential transceivers for Fast  
SCSI  
Y
Available in 100-pin PQFP package  
System Diagram  
TL/F/11212–1  
TRI-STATEÉ is a registered trademark of National Semiconductor Corporation.  
HPCTM is a trademark of National Semiconductor Corporation.  
C
1995 National Semiconductor Corporation  
TL/F/11212  
RRD-B30M105/Printed in U. S. A.  

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