DP8521A

更新时间： 2024-02-22 20:37:23

品牌	Logo	应用领域
美国国家半导体 - NSC		驱动器微控制器和处理器内存控制器
页数	文件大小	规格书
70页	855K
描述
DP8520A/DP8521A/DP8522A microCMOS Programmable 256k/1M/4M Video RAM Controller/Drivers

阅读下载

获取价格

技术参数
数据手册

如果您发现信息不准确，欢迎纠错

DP8521A 技术参数

是否Rohs认证：	不符合	生命周期：	Obsolete
Reach Compliance Code：	compliant	风险等级：	5.92
JESD-30 代码：	S-PQCC-J68	JESD-609代码：	e0
端子数量：	68	最高工作温度：	70 °C
最低工作温度：		封装主体材料：	PLASTIC/EPOXY
封装代码：	QCCJ	封装等效代码：	LDCC68,1.0SQ
封装形状：	SQUARE	封装形式：	CHIP CARRIER
电源：	5 V	认证状态：	Not Qualified
子类别：	Memory Controllers	最大压摆率：	95 mA
标称供电电压：	5 V	表面贴装：	YES
技术：	CMOS	温度等级：	COMMERCIAL
端子面层：	Tin/Lead (Sn/Pb)	端子形式：	J BEND
端子节距：	1.27 mm	端子位置：	QUAD
Base Number Matches：	1

DP8521A 数据手册

PRELIMINARY

May 1992

DP8520A/DP8521A/DP8522A microCMOS Programmable

256k/1M/4M Video RAM Controller/Drivers

General Description

Features

On chip high precision delay line to guarantee critical

VRAM access timing parameters

The DP8520A/21A/22A video RAM controllers provide a

low cost, single chip interface between video RAM and all

8-, 16- and 32-bit systems. The DP8520A/21A/22A gener-

ate all the required access control signal timing for VRAMs.

An on-chip refresh request clock is used to automatically

refresh the VRAM array. Refreshes and accesses are arbi-

trated on chip. If necessary, a WAIT or DTACK output in-

serts wait states into system access cycles, including burst

mode accesses. RAS low time during refreshes and RAS

precharge time after refreshes and back to back accesses

are guaranteed through the insertion of wait states. Sepa-

rate on-chip precharge counters for each RAS output can

be used for memory interleaving to avoid delayed back to

back accesses because of precharge. An additional feature

of the DP8522A is two access ports to simplify dual access-

ing. Arbitration among these ports and refresh is done on

chip.

microCMOS process for low power

High capacitance drivers for RAS, CAS, DT/OE and

VRAM address on chip

On chip support for nibble, page and static column

VRAMs

Byte enable signals on chip allow byte writing in a word

size up to 16 bits with no external logic

Selection of controller speeds: 20 MHz and 25 MHz

On board Port A/Port B (DP8522A only)/refresh arbitra-

tion logic

Direct interface to all major microprocessors (applica-

tion notes available)

4 RAS and 4 CAS drivers (the RAS and CAS configura-

tion is programmable)

Largest

VRAM

Direct Drive

Memory

Access

Ports

of Pins

of Address

Outputs

Control

(PLCC)

Possible

Capacity

Available

DP8520A

DP8521A

DP8522A

256 kbit

1 Mbit

4 Mbit

4 Mbytes

16 Mbytes

64 Mbytes

Single Access Port

Dual Access Ports (A and B)

Block Diagram

DP8520A/21A/22A VRAM Controller

TL/F/9338–5

FIGURE 1

TRI-STATEÉ is a registered trademark of National Semiconductor Corporation.

PALÉ is a registered trademark of and is used under license from Monolithic Memories, Inc.

1995 National Semiconductor Corporation

TL/F/9338

RRD-B30M105/Printed in U. S. A.

12 3 4 5 6 7...70

下载PDF

与DP8521A相关器件

型号	品牌	描述	获取价格	数据表
DP8521AV-20	NSC	DP8520A/DP8521A/DP8522A microCMOS Programmable 256k/1M/4M Video RAM Controller/Drivers	获取价格
DP8521AV-25	NSC	DP8520A/DP8521A/DP8522A microCMOS Programmable 256k/1M/4M Video RAM Controller/Drivers	获取价格
DP8521V	NSC	IC,MEMORY CONTROLLER,CMOS,LDCC,68PIN	获取价格
DP8522A	NSC	DP8520A/DP8521A/DP8522A microCMOS Programmable 256k/1M/4M Video RAM Controller/Drivers	获取价格
DP8522AV-20	NSC	DP8520A/DP8521A/DP8522A microCMOS Programmable 256k/1M/4M Video RAM Controller/Drivers	获取价格
DP8522AV-25	NSC	DP8520A/DP8521A/DP8522A microCMOS Programmable 256k/1M/4M Video RAM Controller/Drivers	获取价格

产品中心

服务支持

精选活动

关于我们

帮助中心

DP8521A

DP8521A 技术参数

DP8521A 数据手册

与DP8521A相关器件

与DP8521A相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

DP8521A

DP8521A 技术参数

DP8521A 数据手册

与DP8521A相关器件

与DP8521A相关文章

您还可以找

您在本页遇到什么问题？