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DP8572A PDF预览

DP8572A

更新时间: 2024-02-18 16:36:29
品牌 Logo 应用领域
美国国家半导体 - NSC 时钟
页数 文件大小 规格书
22页 369K
描述
Real Time Clock (RTC)

DP8572A 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:QCCJ, LDCC28,.5SQReach Compliance Code:unknown
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.8其他特性:PRESCALED XTAL OSCILLATOR OUTPUT FOR RTC; POWER FAIL I/P FOR BUS LOCK-OUT
外部数据总线宽度:8信息访问方法:PARALLEL, DIRECT ADDRESS
中断能力:YJESD-30 代码:S-PQCC-J28
JESD-609代码:e0长度:11.43 mm
端子数量:28计时器数量:
片上数据RAM宽度:8最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:QCCJ封装等效代码:LDCC28,.5SQ
封装形状:SQUARE封装形式:CHIP CARRIER
峰值回流温度(摄氏度):NOT SPECIFIED电源:5 V
认证状态:Not QualifiedRAM(字数):44
座面最大高度:4.57 mm子类别:Timer or RTC
最大压摆率:20 mA最大供电电压:5.5 V
最小供电电压:4.5 V标称供电电压:5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:J BEND端子节距:1.27 mm
端子位置:QUAD最短时间:1/100 SECOND
处于峰值回流温度下的最长时间:NOT SPECIFIED易失性:YES
宽度:11.43 mmuPs/uCs/外围集成电路类型:TIMER, REAL TIME CLOCK
Base Number Matches:1

DP8572A 数据手册

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May 1993  
DP8572A/DP8572AM Real Time Clock (RTC)  
General Description  
The DP8572A (8572AMÐmilitarized version) is intended for  
use in microprocessor based systems where information is  
required for multi-tasking, data logging or general time of  
day/date information. This device is implemented in low  
voltage silicon gate microCMOS technology to provide low  
standby power in battery back-up environments. The cir-  
cuit’s architecture is such that it looks like a contiguous  
block of memory or I/O ports. The address space is orga-  
nized as 2 software selectable pages of 32 bytes. This in-  
cludes the Control Registers, the Clock Counters, the Alarm  
Compare RAM, and the Time Save RAM. Any of the RAM  
locations that are not being used for their intended purpose  
may be used as general purpose CMOS RAM.  
V
V
. Additionally, two supply pins are provided. When  
l
CC  
V
CC  
, internal circuitry will automatically switch from  
BB  
the main supply to the battery supply. Status bits are provid-  
ed to indicate initial application of battery power, system  
power, and low battery detect.  
(Continued)  
Features  
Y
Full function real time clock/calendar  
Ð 12/24 hour mode timekeeping  
Ð Day of week and day of years counters  
Ð Four selectable oscillator frequencies  
Ð Parallel resonant oscillator  
Y
Power fail features  
Time and date are maintained from 1/100 of a second to  
year and leap year in a BCD format, 12 or 24 hour modes.  
Day of week, day of month and day of year counters are  
provided. Time is controlled by an on-chip crystal oscillator  
requiring only the addition of the crystal and two capacitors.  
The choice of crystal frequency is program selectable.  
Ð Internal power supply switch to external battery  
Ð Power Supply Bus glitch protection  
Ð Automatic log of time into RAM at power failure  
On-chip interrupt structure  
Ð Periodic, alarm, and power fail interrupts  
Up to 44 bytes of CMOS RAM  
Y
Y
Y
Y
Power failure logic and control functions have been integrat-  
ed on chip. This logic is used by the RTC to issue a power  
fail interrupt, and lock out the mp interface. The time power  
MIL-STD-883C compliant  
Ý
SMD 5962-91641-01MJX (future)  
l
fails may be logged into RAM automatically when V  
BB  
Block Diagram  
TL/F/9980–1  
FIGURE 1  
TRI-STATEÉ is a registered trademark of National Semiconductor Corporation.  
C
1995 National Semiconductor Corporation  
TL/F/9980  
RRD-B30M75/Printed in U. S. A.  

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