DP8481

更新时间： 2024-11-29 23:16:31

品牌	Logo	应用领域
美国国家半导体 - NSC		转换器电平转换器
页数	文件大小	规格书
6页	113K
描述
TTL to 10k ECL Level Translator with Latch

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中文翻译

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DP8481 数据手册

June 1986

DP8481 TTL to 10k ECL Level Translator with Latch

General Description

Features

16-pin flat-pack or DIP

This circuit translates TTL input levels to ECL output levels

and provides a fall-through latch. The outputs are gated with

CS providing for wire ORing of outputs. The strobe and chip

select inputs operate at ECL levels.

ECL control inputs

CS provided for wire ORing of output bus

10k ECL I/O compatible

3.0 ns typical propagation delay

Logic and Connection Diagram

Truth Table

STR

Dual-In-Line Package

high level (most positive)

low level (most negative)

don’t care

Order Number

DP8481F, DP8481J or DP8481N

See NS Package

F16B, J16A or N16A

TL/F/5862–1

Top View

1995 National Semiconductor Corporation

TL/F/5862

RRD-B30M115/Printed in U. S. A.

12 3 4 5 6

中文翻译

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型号	品牌	获取价格	描述	数据表
DP8481D	ETC	获取价格	TTL-to-ECL Translator
DP8481D-00	TI	获取价格	5 TTL TO ECL TRANSLATOR, INVERTED OUTPUT, PDSO16
DP8481D-00R	TI	获取价格	5 TTL TO ECL TRANSLATOR, INVERTED OUTPUT, PDSO16
DP8481F	NSC	获取价格	TTL to 10k ECL Level Translator with Latch
DP8481F/A+	ETC	获取价格	TTL-to-ECL Translator
DP8481J	NSC	获取价格	TTL to 10k ECL Level Translator with Latch
DP8481J/A+	ETC	获取价格	TTL-to-ECL Translator
DP8481N	NSC	获取价格	TTL to 10k ECL Level Translator with Latch
DP8481-N	TI	获取价格	DP8481 TTL to 10k ECL Level Translator with Latch
DP8481N/A+	ETC	获取价格	TTL-to-ECL Translator