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DP8480A

更新时间: 2024-11-29 21:55:07
品牌 Logo 应用领域
美国国家半导体 - NSC 转换器电平转换器锁存器
页数 文件大小 规格书
6页 122K
描述
DP8480A 10k ECL to TTL Level Translator with Latch

DP8480A 数据手册

 浏览型号DP8480A的Datasheet PDF文件第2页浏览型号DP8480A的Datasheet PDF文件第3页浏览型号DP8480A的Datasheet PDF文件第4页浏览型号DP8480A的Datasheet PDF文件第5页浏览型号DP8480A的Datasheet PDF文件第6页 
April 1990  
DP8480A 10k ECL to TTL Level Translator with Latch  
General Description  
This circuit translates ECL input levels to TTL output levels  
Features  
Y
16-pin DIP  
Y
and provides a fall-through latch. The TRI-STATE outputs  
are designed to drive standard 50 pF loads. The strobe and  
chip select inputs operate at ECL levels.  
TRI-STATE outputs  
É
Y
ECL control inputs  
Y
8 ns typical propagation delay with 50 pF load  
Y
Outputs are TRI-STATE during power up/down for  
glitch free operation  
Y
10k ECL input compatible  
Logic and Connection Diagram  
Truth Table  
Dual-In-Line Package  
D
H
L
Q
L
STR  
L
CS  
L
H
L
L
X
X
Q
H
L
Hi-Z  
X
H
e
e
e
H
L
high level (most positive)  
low level (most negative)  
don’t care  
X
Order Number DP8480AJ or DP8480AN  
See NS Package Number J16A or N16A  
TL/F/5861–1  
Top View  
TRI-STATEÉ is a registered trademark of National Semiconductor Corporation.  
C
1995 National Semiconductor Corporation  
TL/F/5861  
RRD-B30M105/Printed in U. S. A.  

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