DM74LS73AN

更新时间： 2024-11-27 23:00:43

品牌	Logo	应用领域
飞兆/仙童 - FAIRCHILD		/
页数	文件大小	规格书
5页	56K
描述
Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Clear and Complementary Outputs

阅读下载

中文翻译

获取价格

数据手册
替代型号

如果您发现信息不准确，欢迎纠错

DM74LS73AN 数据手册

August 1986

Revised March 2000

DM74LS73A

Dual Negative-Edge-Triggered Master-Slave

J-K Flip-Flops with Clear and Complementary Outputs

General Description

This device contains two independent negative-edge-trig-

gered J-K flip-flops with complementary outputs. The J and

K data is processed by the flip-flops on the falling edge of

the clock pulse. The clock triggering occurs at a voltage

level and is not directly related to the transition time of the

negative going edge of the clock pulse. The data on the J

and K inputs is allowed to change while the clock is HIGH

or LOW without affecting the outputs as long as setup and

hold times are not violated. A low logic level on the clear

input will reset the outputs regardless of the levels of the

other inputs.

Ordering Code:

Order Number Package Number

Package Description

DM74LS73AM

DM74LS73AN

M14A

N14A

14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow

14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Connection Diagram

Function Table

Inputs

CLK

Outputs

CLR

↓

Q₀

Toggle

Q₀

H = HIGH Logic Level

L = LOW Logic Level

X = Either LOW or HIGH Logic Level

↓ = Negative going edge of pulse.

= The output logic level before the indicated input conditions were

established.

Toggle = Each output changes to the complement of its previous level on

each falling edge of the clock pulse.

DS006372

www.fairchildsemi.com

12 3 4 5

中文翻译

下载PDF

DM74LS73AN 替代型号

型号	品牌	替代类型	描述	数据表
SN74LS73ANE4	TI	类似代替	具有清零端的双路 J-K 触发器 \| N \| 14 \| 0 to 70
SN74LS73AN	TI	类似代替	DUAL J-K FLIP-FLOPS WITH CLEAR

与DM74LS73AN相关器件

型号	品牌	获取价格	描述	数据表
DM74LS73AN/A+	ETC	获取价格	J-K-Type Flip-Flop
DM74LS73AN/B+	ETC	获取价格	J-K-Type Flip-Flop
DM74LS73AW	NSC	获取价格	Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Clear and Complementary Outp
DM74LS73J	TI	获取价格	IC,FLIP-FLOP,DUAL,J/K TYPE,LS-TTL,DIP,14PIN,CERAMIC
DM74LS73J/A+	ETC	获取价格	J-K-Type Flip-Flop
DM74LS73N	TI	获取价格	IC,FLIP-FLOP,DUAL,J/K TYPE,LS-TTL,DIP,14PIN,PLASTIC
DM74LS73N/A+	ETC	获取价格	J-K-Type Flip-Flop
DM74LS73N/B+	ETC	获取价格	J-K-Type Flip-Flop
DM74LS74	FAIRCHILD	获取价格	Dual Positive-Edge-Triggered D Flip-Flops with Preset, Clear and Complementary Outputs
DM74LS74A	FAIRCHILD	获取价格	Dual Positive-Edge-Triggered D Flip-Flops with Preset, Clear and Complementary Outputs