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DM74LS379 PDF预览

DM74LS379

更新时间: 2024-11-24 21:55:43
品牌 Logo 应用领域
美国国家半导体 - NSC /
页数 文件大小 规格书
6页 148K
描述
Quad Parallel Register with Enable

DM74LS379 数据手册

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June 1989  
54LS379/DM74LS379  
Quad Parallel Register with Enable  
General Description  
The LS379 is a 4-bit register with buffered common Enable.  
This device is similar to the LS175 but features the common  
Enable rather than common Master Reset.  
Features  
Y
Y
Y
Y
Edge-triggered D-type inputs  
Buffered positive edge-triggered clock  
Buffered common enable input  
True and complement outputs  
Connection Diagram  
Logic Symbol  
Dual-In-Line Package  
TL/F/10186–2  
e
e
V
CC  
GND  
Pin 16  
Pin 8  
TL/F/10186–1  
Order Number 54LS379DMQB, 54LS379FMQB,  
54LS379LMQB, DM74LS379M or DM74LS379N  
See NS Package Number E20A,  
J16A, M16A, N16E or W16A  
Pin  
Description  
Names  
E
Enable Input (Active LOW)  
Data Inputs  
D0D3  
CP  
Clock Pulse Input (Active Rising Edge)  
Flip-Flop Outputs  
Q0Q3  
Q0Q3  
Complement Outputs  
C
1995 National Semiconductor Corporation  
TL/F/10186  
RRD-B30M105/Printed in U. S. A.  

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