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DM74LS38

更新时间： 2024-11-26 23:00:43

品牌	Logo	应用领域
飞兆/仙童 - FAIRCHILD		/
页数	文件大小	规格书
5页	65K
描述
Quad 2-Input NAND Buffer with Open-Collector Outputs

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数据手册

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DM74LS38 数据手册

August 1986

Revised March 2000

DM74LS38

Quad 2-Input NAND Buffer with Open-Collector Outputs

General Description

Pull-Up Resistor Equations

This device contains four independent gates, each of which

performs the logic NAND function. The open-collector out-

puts require external pull-up resistors for proper logical

operation.

Where:

N₁(I_OH) = total maximum output high current

for all outputs tied to pull-up resistor

N₂(I_IH) = total maximum input high current for

all inputs tied to pull-up resistor

N₃(I_IL) = total maximum input low current for

all inputs tied to pull-up resistor

Ordering Code:

Order Number Package Number

Package Description

DM74LS38M

DM74LS38SJ

DM74LS38N

M14A

M14D

N14A

14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow

14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Connection Diagram

Function Table

Y = AB

Inputs

Output

H = HIGH Logic Level

L = LOW Logic Level

DS006363

www.fairchildsemi.com

12 3 4 5

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