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DM74LS279M PDF预览

DM74LS279M

更新时间: 2024-11-28 23:00:43
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美国国家半导体 - NSC 触发器锁存器逻辑集成电路光电二极管输入元件
页数 文件大小 规格书
6页 140K
描述
Quad S-R Latches

DM74LS279M 数据手册

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May 1989  
54LS279/DM54LS279/DM74LS279  
Quad S-R Latches  
General Description  
The ’LS279 consists of four individual and independent Set-  
Reset Latches with active low inputs. Two of the four latch-  
es have an additonal S input ANDed with the primary S  
input. A low on any S input while the R input is high will be  
stored in the latch and appear on the corresponding Q out-  
put as a high. A low on the R input while the S input is high  
will clear the Q output to a low. Simultaneous transistion of  
the R and S inputs from low to high will cause the Q output  
to be indeterminate. Both inputs are voltage level triggered  
and are not affected by transition time of the input data.  
Features  
Y
Alternate military/aerospace device (54LS279) is avail-  
able. Contact a National Semiconductor Sales Office/  
Distributor for specifications.  
Connection Diagram  
Dual-In-Line Package  
TL/F/6420–1  
Order Number 54LS279DMQB, 54LS279FMQB, 54LS279LMQB,  
DM54LS279J, DM74LS279M or DM74LS279N  
See NS Package Number E20A, J16A, M16A, N16E or W16A  
Function Table  
Inputs  
S(1)  
Output  
Q
R
L
L
L
H
L
H*  
H
H
H
L
H
Q
0
e
e
H
L
High Level  
Low Level  
e
Q
0
The Level of Q before the indicated input conditions were established.  
*This output level is pseudo stable; that is, it may not persist when the S and R  
inputs return to their inactive (high) level.  
Note 1: For latches with double S inputs:  
e
e
H
L
both S inputs high  
one or both S inputs low  
C
1995 National Semiconductor Corporation  
TL/F/6420  
RRD-B30M105/Printed in U. S. A.  

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