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DM74LS283 PDF预览

DM74LS283

更新时间: 2024-11-08 23:00:43
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD /
页数 文件大小 规格书
6页 67K
描述
4-Bit Binary Adder with Fast Carry

DM74LS283 数据手册

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August 1986  
Revised March 2000  
DM74LS283  
4-Bit Binary Adder with Fast Carry  
General Description  
Features  
These full adders perform the addition of two 4-bit binary  
numbers. The sum () outputs are provided for each bit  
and the resultant carry (C4) is obtained from the fourth bit.  
These adders feature full internal look ahead across all four  
bits. This provides the system designer with partial look-  
ahead performance at the economy and reduced package  
count of a ripple-carry implementation.  
Full-carry look-ahead across the four bits  
Systems achieve partial look-ahead performance with  
the economy of ripple carry  
Typical add times  
Two 8-bit words 25 ns  
Two 16-bit words 45 ns  
Typical power dissipation per 4-bit adder 95 mW  
The adder logic, including the carry, is implemented in its  
true form meaning that the end-around carry can be  
accomplished without the need for logic or level inversion.  
Ordering Code:  
Order Number Package Number  
Package Description  
DM74LS283M  
DM74LS283N  
M16A  
N16E  
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow  
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide  
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Connection Diagram  
© 2000 Fairchild Semiconductor Corporation  
DS006421  
www.fairchildsemi.com  

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