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DM74LS279MX PDF预览

DM74LS279MX

更新时间: 2024-11-28 23:47:39
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 触发器锁存器逻辑集成电路光电二极管输入元件
页数 文件大小 规格书
4页 51K
描述
S-R-Type Latch

DM74LS279MX 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:SOIC包装说明:SOP, SOP16,.25
针数:16Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.33
其他特性:WITH DUAL S INPUT FOR TWO FUNCTIONS系列:LS
JESD-30 代码:R-PDSO-G16JESD-609代码:e0
长度:9.9 mm逻辑集成电路类型:R-S LATCH
最大I(ol):0.008 A位数:2
功能数量:4端子数量:16
最高工作温度:70 °C最低工作温度:
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP16,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
包装方法:TAPE AND REEL峰值回流温度(摄氏度):NOT SPECIFIED
电源:5 V最大电源电流(ICC):7 mA
Prop。Delay @ Nom-Sup:33 ns传播延迟(tpd):33 ns
认证状态:Not Qualified座面最大高度:1.75 mm
子类别:FF/Latches最大供电电压 (Vsup):5.25 V
最小供电电压 (Vsup):4.75 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:TTL
温度等级:COMMERCIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
触发器类型:LOW LEVEL宽度:3.9 mm
Base Number Matches:1

DM74LS279MX 数据手册

 浏览型号DM74LS279MX的Datasheet PDF文件第2页浏览型号DM74LS279MX的Datasheet PDF文件第3页浏览型号DM74LS279MX的Datasheet PDF文件第4页 
August 1986  
Revised March 2000  
DM74LS279  
Quad S-R Latch  
General Description  
The DM74LS279 consists of four individual and indepen-  
dent Set-Reset Latches with active low inputs. Two of the  
four latches have an additional S input ANDed with the pri-  
mary S input. A LOW on any S input while the R input is  
HIGH will be stored in the latch and appear on the corre-  
sponding Q output as a HIGH. A LOW on the R input while  
the S input is HIGH will clear the Q output to a LOW. Simul-  
taneous transition of the R and S inputs from LOW-to-  
HIGH will cause the Q output to be indeterminate. Both  
inputs are voltage level triggered and are not affected by  
transition time of the input data.  
Ordering Code:  
Order Number Package Number  
Package Description  
DM74LS279M  
DM74LS279N  
M16A  
N16E  
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow  
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide  
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Connection Diagram  
Function Table  
Inputs  
S (Note 1)  
Output  
R
L
Q
L
L
H (Note 2)  
H
L
H
L
H
H
H
Q0  
H = HIGH Level  
L = LOW Level  
Q
= The Level of Q before the indicated input conditions were established.  
0
Note 1: For latches with double S inputs:  
H = both S inputs HIGH  
L = one or both S inputs LOW  
Note 2: This output level is pseudo stable; that is, it may not persist when  
the S and R inputs return to their inactive (HIGH) level.  
© 2000 Fairchild Semiconductor Corporation  
DS006420  
www.fairchildsemi.com  

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