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CYRS1049DV33 PDF预览

CYRS1049DV33

更新时间: 2024-11-25 12:51:27
品牌 Logo 应用领域
赛普拉斯 - CYPRESS /
页数 文件大小 规格书
16页 1071K
描述
4-Mbit (512 K × 8) Static RAM

CYRS1049DV33 数据手册

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CYRS1049DV33  
4-Mbit (512 K × 8) Static RAM  
with RadStop™ Technology  
4-Mbit (512  
K × 8) Static RAM with RadStop™ Technology  
Radiation Performance  
Features  
Temperature ranges  
Radiation Data  
Military/Space: –55 °C to 125 °C  
Total dose 300 Krad  
High speed  
tAA = 12 ns  
Soft  
error rate (both heavy ion and proton)  
Heavy ions 1 × 10-10 upsets/bit-day with single-error  
correction, double error detection error detection and  
correction (SEC-DED EDAC)  
Low active power  
ICC = 95 mA at 12 ns (PMAX = 315 mW)  
Neutron = 2.0 × 1014 N/cm2  
Low CMOS standby power  
ISB2 = 15 mA  
Dose rate > 2.0 × 109 (rad(Si)/s)  
Latch up immunity LET = 120 MeV.cm2/mg (125 C)  
2.0 V data retention  
Automatic power-down when deselected  
Transistor-transistor logic (TTL) compatible inputs and outputs  
Easy memory expansion with CE and OE features  
Available in Pb-free 36-pin ceramic flat package  
Processing Flows  
V grade - Class V flow in compliance with MIL-PRF 38535  
Prototyping Options  
Non qualified manufacturers list (QML)  
V
grade  
CYPT1049DV33 devices with same functional and timing  
characteristics in a 36-pin ceramic flat package  
Logic Block Diagram  
I/O  
0
INPUT BUFFER  
A
A
A
A
A
A
A
A
A
0
1
2
3
4
5
6
7
8
I/O  
1  
I/O  
2  
I/O  
512K x 8  
ARRAY  
3
4
5
6
I/O  
I/O  
A
A
9
I/O  
10  
CE  
POWER  
DOWN  
I/O  
7
COLUMN DECODER  
WE  
OE  
Cypress Semiconductor Corporation  
Document Number: 001-64292 Rev. *C  
198 Champion Court  
San Jose, CA 95134-1709  
408-943-2600  
Revised March 19, 2012  

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