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CY8C4149LDE-S593 PDF预览

CY8C4149LDE-S593

更新时间: 2024-11-07 15:18:07
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英飞凌 - INFINEON /
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69页 1557K
描述
Automotive PSoC? 4100S Max

CY8C4149LDE-S593 数据手册

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CY8C41xx  
PSoC™ Automotive 4100S Max  
Based on Arm® Cortex®-M0+ CPU  
General description  
PSoC™ 4 MCU is a scalable and reconfigurable platform architecture for a family of programmable embedded  
system controllers with an Arm® Cortex®-M0+ CPU while being AEC-Q100 compliant. It combines programmable  
and reconfigurable analog and digital blocks with flexible automatic routing. PSoC™ 4100S Max is a member of  
the PSoC™ 4 MCU platform architecture. It is a combination of a microcontroller with standard communication  
and timing peripherals, a multi-sense converter block supporting CAPSENSE™ with best-in-class performance,  
programmable general-purpose continuous-time and switched-capacitor analog blocks, and programmable  
connectivity. PSoC™ 4100S Max products will be upward compatible with members of the PSoC™ 4 MCU platform  
for new applications and design needs.  
Features  
• Automotive Electronics Council (AEC) AEC-Q100 qualified  
• 32-bit MCU subsystem  
- 48-MHz Arm® Cortex®-M0+ CPU  
- Up to 384 KB of flash with Read Accelerator  
- Up to 32 KB of SRAM  
- 16-channel DMA engine  
• Programmable analog  
- Two opamps with reconfigurable high-drive external and high-bandwidth internal drive and comparator  
modes and ADC input buffering capability. Opamps can operate in Deep Sleep low-power mode.  
- 12-bit 1-Msps SAR ADC with differential and single-ended modes, and channel sequencer with signal averaging  
- Temperature sensor built into SAR ADC  
- Two low-power comparators that operate in Deep Sleep low-power mode  
• Programmable digital  
- Programmable logic blocks allowing Boolean operations to be performed on port inputs and outputs  
• Low-power 1.71 V to 5.5 V operation  
- Deep Sleep mode with operational analog and 2.5 A digital system current  
• Capacitive block  
- Multi-sensing converter (MSC) provides best-in-class signal-to-noise ratio (SNR) (>5:1) and water tolerance for  
capacitive sensing  
- Software component makes capacitive sensing design easy  
- Automatic hardware tuning (SmartSense)  
• LCD drive capability  
- LCD segment drive capability on GPIOs  
• Serial communication  
- Five independent run-time reconfigurable Serial Communication Blocks (SCBs) with re-configurable I2C, SPI,  
UART functionality, or LIN Slave functionality  
• Audio I2S  
- I2S TX Master supported  
Errata: For information on silicon errata, see “Errata” on page 67. Details include trigger conditions, devices  
affected, and proposed workaround.  
Datasheet  
www.infineon.com  
Please read the Important Notice and Warnings at the end of this document  
page 1  
002-30041 Rev. *D  
2023-08-18  

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