Datasheet > CY8C42323

CY8C42323

更新时间： 2024-11-06 04:38:11

品牌	Logo	应用领域
赛普拉斯 - CYPRESS		/
页数	文件大小	规格书
42页	955K
描述
Power PSoC⑩ Devices

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中文翻译

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数据手册

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CY8C42323 数据手册

CY8C42123/CY8C42223

CY8C42323/CY8C42423

PRELIMINARY

Power PSoC™ Devices

• Configurable Analog Mux, 10:1 or 5:2 Differential

• Configurable Digital Blocks

1.0 Features

1.1

Key Features

—8- to 16-Bit Timers, Counters, and PWMs

—Connectable to All GPIO Pins

• Extended Operating Voltage of 2.5V to 36V

• 2 HV Linear Opamp Control Loops for Driving Power PFETs

—Connectable to All High Voltage Output Pins

—Single Block Deadband PWM with Kill

—Digital Blocks can Drive Outputs to 36V

—Complex Peripherals by Combining Blocks

• 2 HV Switching Control Loops for Driving External PFETs

• 2 High Voltage CMOS or Open Drain Outputs

• 2 High Voltage Analog Sense Inputs

• 4KB of Flash

1.3

Applications

• 256 Bytes of SRAM

• Battery Chargers (Linear, Switched, or Fly Back)

• DC-DC Buck and Boost Converters

1.2

Improved Features

• Fan Controllers (Tachometer, Temp. Sense, Current Limit)

• Motor Drivers (H-Bridge, Hall-Effect Sensors)

• White LED Drivers

• Very Low Current Mode for 100 nA Sleep (Deep Sleep)

• Analog Absolute Accuracy (0.75%)

• Additional Flexibility for Sleep Modes

• 2 Comparators with DAC References

• 6- to 12-Bit ADC (20 Ksps at 8 Bits)

• Temperature Sensor (Thermistor, Thermocouple)

• General-Purpose High Voltage Microcontroller

2.0 Block Diagram

LowDrop-Out

Regulator

ANALOG and HIGH VOLTAGE

SECTIONS

HVdd

InternalVdd

ODAC1

ODAC0

VBG

DBC01

VDAC1

VDAC0

DBC00

VDAC1

VDAC0

IBIAS

GDO1

VS1

GDO0

VS0

Analogto

Digital

Convertor

HVO[1]

P0[7]

P0[5]

P0[3]

P0[1]

P1[1]

HVO[0]

P0[6]

P0[4]

P0[2]

P0[0]

P1[0]

HVDriver

Atten1

Atten0

AMuxBus3

AMuxBus1

AMuxBus2

AMuxBus0

IDAC1

IDAC0

SYSTEMRESOURCES

PSoCCORE

LowSpeed

Oscillator

SleepandWatchdog

COMP1

COMP0

POR andLVD

Internal

Voltage

Reference

ODAC1

ODAC0

M8CCPU

PSoCCORE

Internal

Main

Oscillator

4KBFlash

GlobalDigitalInterconnectBus

System Bus

256BSRAM

I2C

DBC00

DBC01

DBD02

DBD03

SystemResets

Digital

Clocks

DigitalPSoCBlockArray

DIGITAL SYSTEM

1DigitalRow

InterruptController

Figure 2-1. Block Diagram

198 Champion Court

Cypress Semiconductor Corporation

Document 38-12034 Rev. *C

•

San Jose, CA 95134

•

408.943.2600

Revised November 17, 2005

12 3 4 5 6 7...42

中文翻译

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CY8C42323-24ZXI	CYPRESS	获取价格	Power PSoC⑩ Devices
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CY8C4244AZI-443	CYPRESS	获取价格	Programmable System-on-Chip (PSoCÂ®)
CY8C4244AZI-443	INFINEON	获取价格	32位PSoC? 4 Arm? Cortex?-M0/M0+