Datasheet > CY8C201A0

CY8C201A0

更新时间： 2024-11-07 03:12:35

品牌	Logo	应用领域
赛普拉斯 - CYPRESS		/
页数	文件大小	规格书
12页	334K
描述
CapSense Express⑩ -10 Configurable IOs with Slider

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CY8C201A0 数据手册

CY8C201A0

CapSense Express™ -10 Configurable IOs

with Slider

Features

Overview

■ 10 configurable IOs supporting

❐ CapSense slider

❐ LED drive

❐ Interrupt outputs

❐ WAKE on interrupt input

❐ User defined input or output

The CapSense Express^TMcontroller allows the control of 10

IOs configurable as capacitive sensing buttons or as GPIOs

for driving LEDs or interrupt signals based on various button

conditions. The GPIOs are also configurable for waking up the

device from sleep based on an interrupt input.

The user has the ability to configure buttons, outputs, and

parameters, through specific commands sent to the I²C port.

The IOs have the flexibility in mapping to capacitive buttons

and as standard GPIO functions such as interrupt output or

input, LED drive and digital mapping of input to output using

simple logical operations. This enables easy PCB trace

routing and reduces the PCB size and stack up. CapSense

Express products are designed for easy integration into

complex products.

■ 2.4V to 5.25V operating voltage

■ Industrial temperature range: –40°C to +85°C

■ I²C slave interface for configuration

❐ Selectable to 50 kHz,100 kHz and 400 kHz.

■ Reduce BOM cost

❐ Internal oscillator - no external oscillators or crystal

❐ Free development tool - no external tuning components

Architecture

■ Low operating current

❐ Active current: continuous sensor scan: 1.5 mA

❐ Sleep current: no scan, continuous sleep: 2.6 uA

The logic block diagram shows the internal architecture of

CY8C201A0.

The user can configure registers with parameters needed to

adjust the operation and sensitivity of the CapSense system.

CY8C201A0 supports a standard I²C serial communication

interface that allows the host to configure the device and to

read sensor information in real time through easy register

access.

■ Available in 16-pin COL and 16-pin SOIC packages

The CapSense Express Core

The CapSense ExpressCore has a powerful configuration and

control block. It encompasses SRAM for data storage, an

interrupt controller, sleep and watchdog timers. System

resources provide additional capability, such as a configurable

I²C slave communication interface and various system resets.

The Analog System is composed of the CapSense PSoC

block which supports capacitive sensing of up to 10 inputs.

Cypress Semiconductor Corporation

Document Number: 001-17349 Rev. *B

•

198 Champion Court

•

San Jose, CA 95134-1709

•

408-943-2600

Revised March 11, 2008

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与CY8C201A0相关器件

型号	品牌	获取价格	描述	数据表
CY8C201A0_09	CYPRESS	获取价格	CapSense Express-10 Configurable IOs with Slider
CY8C201A0_12	CYPRESS	获取价格	CapSenseÂ® Expressâ¢ Slider Capacitive Contr
CY8C201A0-LDX2I	CYPRESS	获取价格	CapSense Express⑩ -10 Configurable IOs with S
CY8C201A0-SX2I	CYPRESS	获取价格	CapSense Express⑩ -10 Configurable IOs with S
CY8C20224	CYPRESS	获取价格	CapSense PSoC Programmable System-on-Chip
CY8C20224_11	CYPRESS	获取价格	CapSense? PSoC? Programmable System-on-Chip?
CY8C20224_12	CYPRESS	获取价格	CapSenseÂ® PSoCÂ® Programmable System-on-Chip
CY8C20224-12LKXI	CYPRESS	获取价格	CapSense PSoC Programmable System-on-Chip
CY8C20224-12LKXIT	CYPRESS	获取价格	CapSense PSoC Programmable System-on-Chip
CY8C20234	CYPRESS	获取价格	PSoC㈢ Mixed-Signal Array

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