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CY8C20224_12 PDF预览

CY8C20224_12

更新时间: 2024-11-27 12:21:15
品牌 Logo 应用领域
赛普拉斯 - CYPRESS /
页数 文件大小 规格书
41页 678K
描述
CapSense® PSoC® Programmable System-on-Chip™

CY8C20224_12 数据手册

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CY8C20224, CY8C20324  
CY8C20424, CY8C20524  
CapSense® PSoC®  
Programmable System-on-Chip™  
CapSense® PSoC® Programmable System-on-Chip  
High-performance CapSense  
Features  
Ultra fast scan speed —1 kHz (nominal)  
Reliable finger detection through 5 mm thick acrylic  
Excellent EMI and AC noise immunity  
Low power, configurable CapSense®  
Configurable capacitive sensing elements  
operating voltage  
Operating voltage: 2.4 V to 5.25 V  
Low operating current  
• Active 1.5 mA (at 3.0 V, 12 MHz)  
• Sleep 2.8 µA (at 3.3 V)  
Supports up to 25 capacitive buttons  
Supports one slider  
Up to 10 cm proximity sensing  
Supports up to 28 general-purpose I/O (GPIO) pins  
• Drive LEDs and other outputs  
Configurable LED behavior (fading, strobing)  
LED color mixing (RBG LEDs)  
Industry best flexibility  
8 KB flash program storage 50,000 erase and write cycles  
512-bytes SRAM data storage  
Bootloader for ease of field reprogramming  
Partial flash updates  
Flexible flash protection modes  
Interrupt controller  
In-system serial programming (ISSP)  
Free complete development tool (PSoC Designer™)  
Full-featured, in-circuit emulator and programmer  
• Full-speed emulation  
• Complex breakpoint structure  
• 128 KB trace memory  
Pull-up, high Z, open-drain, and CMOS drive modes on all  
GPIOs  
Additional system resources  
Configurable communication speeds  
I2C slave  
Internal ±5.0% 6 or12 MHz main oscillator  
Internal low-speed oscillator at 32 kHz  
Low external component count  
• No external crystal or oscillator components  
• No external voltage regulator required  
SPI master and SPI slave  
Watchdog and sleep timers  
Internal voltage reference  
Integrated supervisory circuit  
Logic Block Diagram  
Port 3 Port 2 Port 1 Port 0  
3V LDO  
PSoC  
CORE  
System Bus  
Global Analog Interconnect  
SRAM  
512 Bytes  
SROM  
Flash 8K  
CPU Core  
(M8C)  
Sleep and  
Watchdog  
Interrupt  
Controller  
6/12 MHz Internal Main Oscillator  
Analog  
Ref.  
CapSense  
Basic  
Block  
ANALOG  
SYSTEM  
POR and LVD  
System Resets  
I2C Slave/SPI  
Master-Slave  
Analog  
Mux  
SYSTEM RESOURCES  
Cypress Semiconductor Corporation  
Document Number: 001-41947 Rev. *L  
198 Champion Court  
San Jose, CA 95134-1709  
408-943-2600  
Revised June 15, 2012  

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