Datasheet > 存储 > FIFO> CY7C421-15AXCT

CY7C421-15AXCT

更新时间： 2024-11-05 13:07:15

品牌	Logo	应用领域
赛普拉斯 - CYPRESS		先进先出芯片
页数	文件大小	规格书
17页	607K
描述
FIFO, 512X9, 15ns, Asynchronous, CMOS, PQFP32

阅读下载

中文翻译

获取价格

技术参数
数据手册

如果您发现信息不准确，欢迎纠错

CY7C421-15AXCT 技术参数

是否Rohs认证：	符合	生命周期：	Obsolete
包装说明：	QFP, TQFP32,.35SQ,32	Reach Compliance Code：	compliant
风险等级：	5.7	最长访问时间：	15 ns
最大时钟频率 (fCLK)：	40 MHz	JESD-30 代码：	S-PQFP-G32
JESD-609代码：	e3	内存集成电路类型：	OTHER FIFO
内存宽度：	9	湿度敏感等级：	3
端子数量：	32	字数：	512 words
字数代码：	512	工作模式：	ASYNCHRONOUS
最高工作温度：	70 °C	最低工作温度：
组织：	512X9	封装主体材料：	PLASTIC/EPOXY
封装代码：	QFP	封装等效代码：	TQFP32,.35SQ,32
封装形状：	SQUARE	封装形式：	FLATPACK
电源：	5 V	认证状态：	Not Qualified
最大待机电流：	0.01 A	子类别：	FIFOs
最大压摆率：	0.065 mA	标称供电电压 (Vsup)：	5 V
表面贴装：	YES	技术：	CMOS
温度等级：	COMMERCIAL	端子面层：	Matte Tin (Sn)
端子形式：	GULL WING	端子节距：	0.8 mm
端子位置：	QUAD	Base Number Matches：	1

CY7C421-15AXCT 数据手册

CY7C419/21/25/29/33256/512/1K/2K/4K

x 9 Asynchronous FIFO

CY7C419/21/25/29/33

256/512/1K/2K/4K x 9 Asynchronous FIFO

Features

Functional Description

■ Asynchronous first-in first-out (FIFO) buffer memories

■ 256 x 9 (CY7C419)

The CY7C419, CY7C420/1, CY7C424/5, CY7C428/9, and

CY7C432/3 are first-in first-out (FIFO) memories offered in

600-mil wide and 300-mil wide packages. There are 256, 512,

1,024, 2,048, and 4,096 words respectively by 9 bits wide. Each

FIFO memory is organized such that the data is read in the same

sequential order that it was written. Full and empty flags are

provided to prevent overrun and underrun. Three additional pins

are also provided to facilitate unlimited expansion in width, depth,

or both. The depth expansion technique steers the control

signals from one device to another in parallel. This eliminates the

serial addition of propagation delays, so that throughput is not

reduced. Data is steered in a similar manner.

■ 512 x 9 (CY7C421)

■ 1K x 9 (CY7C425)

■ 2K x 9 (CY7C429)

■ 4K x 9 (CY7C433)

■ Dual-ported RAM cell

■ High speed 50 MHz read and write independent of depth and

width

The read and write operations may be asynchronous; each can

occur at a rate of 50 MHz. The write operation occurs when the

write (W) signal is LOW. Read occurs when read (R) goes LOW.

The nine data outputs go to the high impedance state when R is

HIGH.

■ Low operating power: I_CC= 35 mA

■ Empty and full flags (Half Full flag in standalone)

■ TTL compatible

A Half Full (HF) output flag that is valid in the standalone and

width expansion configurations is provided. In the depth

expansion configuration, this pin provides the expansion out

(XO) information that is used to tell the next FIFO that it is

activated.

■ Retransmit in standalone

■ Expandable in width

■ PLCC, 7x7 TQFP, SOJ, 300-mil, and 600-mil DIP

■ Pb-free packages available

In the standalone and width expansion configurations, a LOW on

the retransmit (RT) input causes the FIFOs to retransmit the

data. Read enable (R) and write enable (W) must both be HIGH

during retransmit, and then R is used to access the data.

■ Pin compatible and functionally equivalent to IDT7200,

IDT7201, IDT7202, IDT7203, IDT7204, AM7200, AM7201,

AM7202, AM7203, and AM7204

The CY7C419, CY7C420, CY7C421, CY7C424, CY7C425,

CY7C428, CY7C429, CY7C432, and CY7C433 are fabricated

using an advanced 0.65-micron P-well CMOS technology. Input

ESD protection is greater than 2000V and latch-up is prevented

by careful layout and guard rings.

Logic Block Diagram

Cypress Semiconductor Corporation

Document #: 38-06001 Rev. *C

•

198 Champion Court

•

San Jose, CA 95134-1709

•

408-943-2600

Revised December 09, 2008

[+] Feedback

12 3 4 5 6 7...17

中文翻译

下载PDF

与CY7C421-15AXCT相关器件

型号	品牌	获取价格	描述	数据表
CY7C421-15DMB	CYPRESS	获取价格	256/512/1K/2K/4K x 9 Asynchronous FIFO
CY7C421-15JC	CYPRESS	获取价格	256/512/1K/2K/4K x 9 Asynchronous FIFO
CY7C421-15JCT	CYPRESS	获取价格	FIFO, 512X9, 15ns, Asynchronous, CMOS, PQCC32, PLASTIC, LCC-32
CY7C421-15JI	CYPRESS	获取价格	256/512/1K/2K/4K x 9 Asynchronous FIFO
CY7C421-15JIR	CYPRESS	获取价格	FIFO, 512X9, 15ns, Asynchronous, CMOS, PQCC32, PLASTIC, LCC-32
CY7C421-15JIT	CYPRESS	获取价格	暂无描述
CY7C421-15LMB	CYPRESS	获取价格	256/512/1K/2K/4K x 9 Asynchronous FIFO
CY7C421-15PC	CYPRESS	获取价格	暂无描述
CY7C421-15PI	CYPRESS	获取价格	FIFO, 512X9, 15ns, Asynchronous, CMOS, PDIP28, 0.300 INCH, PLASTIC, DIP-28
CY7C421-15VCR	CYPRESS	获取价格	FIFO, 512X9, 15ns, Asynchronous, CMOS, PDSO28, 0.300 INCH, PLASTIC, SOJ-28

与CY7C421-15AXCT相关文章

英伟达新AI芯片Rubin或提前半年亮相
2024-11-05

13
苹果iPhone 17将全系采用三星/LG显示LTPO OLED面板
2024-11-05

9
三星深化印度制造布局，供应链本地化进程加速
2024-10-29

35
芯擎科技“星辰一号”自动驾驶芯片点亮成功，2025年量产在即
2024-10-29

31

产品中心

服务支持

精选活动

关于我们

帮助中心

CY7C421-15AXCT

CY7C421-15AXCT 技术参数

CY7C421-15AXCT 数据手册

与CY7C421-15AXCT相关器件

与CY7C421-15AXCT相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

CY7C421-15AXCT

CY7C421-15AXCT 技术参数

CY7C421-15AXCT 数据手册

与CY7C421-15AXCT相关器件

与CY7C421-15AXCT相关文章

您还可以找

您在本页遇到什么问题？