Datasheet > CY7C4211V-25JCT

CY7C4211V-25JCT

更新时间： 2024-11-20 19:57:31

品牌	Logo	应用领域
赛普拉斯 - CYPRESS		先进先出芯片
页数	文件大小	规格书
18页	525K
描述
FIFO, 512X9, 15ns, Synchronous, CMOS, PQCC32, PLASTIC, LCC-32

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技术参数
数据手册

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CY7C4211V-25JCT 技术参数

生命周期：	Obsolete	零件包装代码：	QFJ
包装说明：	QCCJ,	针数：	32
Reach Compliance Code：	unknown	ECCN代码：	EAR99
HTS代码：	8542.32.00.71	风险等级：	5.84
最长访问时间：	15 ns	周期时间：	25 ns
JESD-30 代码：	R-PQCC-J32	长度：	13.97 mm
内存密度：	4608 bit	内存宽度：	9
功能数量：	1	端子数量：	32
字数：	512 words	字数代码：	512
工作模式：	SYNCHRONOUS	最高工作温度：	70 °C
最低工作温度：		组织：	512X9
输出特性：	3-STATE	可输出：	YES
封装主体材料：	PLASTIC/EPOXY	封装代码：	QCCJ
封装形状：	RECTANGULAR	封装形式：	CHIP CARRIER
并行/串行：	PARALLEL	认证状态：	Not Qualified
座面最大高度：	3.556 mm	最大供电电压 (Vsup)：	3.6 V
最小供电电压 (Vsup)：	3 V	标称供电电压 (Vsup)：	3.3 V
表面贴装：	YES	技术：	CMOS
温度等级：	COMMERCIAL	端子形式：	J BEND
端子节距：	1.27 mm	端子位置：	QUAD
宽度：	11.43 mm	Base Number Matches：	1

CY7C4211V-25JCT 数据手册

CY7C4421V/4201V/4211V/4221VCY7C4231V/4241V/4251VLow-Voltage 64/256/512/1K/2K/4K/8K

x 9 Synchronous FIFOs

CY7C4421V/4201V/4211V/4221V

CY7C4231V/4241V/4251V

Low-Voltage 64/256/512/1K/2K/4K/8K x 9 Synchronous FIFOs

• Space saving 32-pin 7 mm × 7 mm TQFP

Featuresb

• 32-pin PLCC

• High-speed, low-power, first-in, first-out (FIFO)

memories

• Available in Pb-Free Packages

• 64 x 9 (CY7C4421V)

• 256 x 9 (CY7C4201V)

• 512 x 9 (CY7C4211V)

• 1K x 9 (CY7C4221V)

• 2K x 9 (CY7C4231V)

• 4K x 9 (CY7C4241V)

• 8K x 9 (CY7C4251V)

Functional Description

The CY7C42X1V are high-speed, low-power, FIFO memories

with clocked read and write interfaces. All are nine bits wide.

Programmable features include Almost Full/Almost Empty

flags. These FIFOs provide solutions for a wide variety of data

buffering needs, including high-speed data acquisition, multi-

processor interfaces, and communications buffering.

These FIFOs have 9-bit input and output ports that are

controlled by separate clock and enable signals. The input port

is controlled by a Free-Running Clock (WCLK) and two Write

Enable pins (WEN1, WEN2/LD).

• High-speed 66-MHz operation (15-ns read/write cycle

time)

• Low power (I_CC= 20 mA)

When WEN1 is LOW and WEN2/LD is HIGH, data is written

into the FIFO on the rising edge of the WCLK signal. While

WEN1, WEN2/LD is held active, data is continually written into

the FIFO on each WCLK cycle. The output port is controlled in

a similar manner by a Free-Running Read Clock (RCLK) and

two Read Enable Pins (REN1, REN2). In addition, the

CY7C42X1V has an Output Enable Pin (OE). The Read

(RCLK) and Write (WCLK) clocks may be tied together for

single-clock operation or the two clocks may be run indepen-

dently for asynchronous read/write applications. Clock

frequencies up to 66 MHz are achievable.

• 3.3V operation for low power consumption and easy

integration into low-voltage systems

• 5V-tolerant inputs V_{IH max}= 5V

• Fully asynchronous and simultaneous read and write

operation

• Empty, Full, and Programmable Almost Empty and

Almost Full status flags

• TTL compatible

• Output Enable (OE) pin

Depth expansion is possible using one enable input for system

control, while the other enable is controlled by expansion logic

to direct the flow of data.

• Independent read and write enable pins

• Center power and ground pins for reduced noise

• Width expansion capability

Pin Configuration

Logic Block Diagram

0− 8

PLCC

Top View

INPUT

1 323130

PAF

PAE

GND

REN1

RCLK

REN2

WEN1

27 WCLK

WCLKWEN1 WEN2/LD

WEN2/LD

FLAG

PROGRAM

WRITE

CONTROL

14151617181920

PAE

PAF

FLAG

LOGIC

Dual Port

RAM Array

64 x 9

WRITE

POINTER

READ

POINTER

8Kx 9

RESET

LOGIC

THREE-STATE

OUTPUTREGISTER

READ

CONTROL

0− 8

RCLK REN1 REN2

Cypress Semiconductor Corporation

Document #: 38-06010 Rev. *B

•

3901 North First Street

•

San Jose, CA 95134

•

408-943-2600

Revised July 14, 2005

12 3 4 5 6 7...18

中文翻译

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与CY7C4211V-25JCT相关器件

型号	品牌	获取价格	描述	数据表
CY7C4211V-35AC	CYPRESS	获取价格	FIFO, 512X9, 20ns, Synchronous, CMOS, PQFP32, 7 X 7 MM, 1 MM HEIGHT, PLASTIC, TQFP-32
CY7C4211V-35JC	CYPRESS	获取价格	FIFO, 512X9, 20ns, Synchronous, CMOS, PQCC32, PLASTIC, LCC-32
CY7C4211V-35JCT	CYPRESS	获取价格	FIFO, 512X9, 20ns, Synchronous, CMOS, PQCC32, PLASTIC, LCC-32
CY7C421-20AC	CYPRESS	获取价格	FIFO, 512X9, 20ns, Asynchronous, CMOS, PQFP32, PLASTIC, TQFP-32
CY7C421-20DC	CYPRESS	获取价格	FIFO, 512X9, 20ns, Asynchronous, CMOS, CDIP28, 0.300 INCH, CERDIP-28
CY7C421-20DMB	CYPRESS	获取价格	FIFO, 512X9, 20ns, Asynchronous, CMOS, CDIP28, 0.300 INCH, CERDIP-28
CY7C421-20JC	CYPRESS	获取价格	256/512/1K/2K/4K x 9 Asynchronous FIFO
CY7C421-20JCR	CYPRESS	获取价格	FIFO, 512X9, 20ns, Asynchronous, CMOS, PQCC32, PLASTIC, LCC-32
CY7C421-20JCT	CYPRESS	获取价格	FIFO, 512X9, 20ns, Asynchronous, CMOS, PQCC32, PLASTIC, LCC-32
CY7C421-20JI	CYPRESS	获取价格	256/512/1K/2K/4K x 9 Asynchronous FIFO

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