是否Rohs认证: | 不符合 | 生命周期: | Obsolete |
零件包装代码: | LCC | 包装说明: | WINDOWED, LCC-44 |
针数: | 44 | Reach Compliance Code: | not_compliant |
ECCN代码: | 3A001.A.2.C | HTS代码: | 8542.39.00.01 |
风险等级: | 5.92 | 其他特性: | LABS INTERCONNECTED BY PIA; 8 LABS; 128 MACROCELLS; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK |
最大时钟频率: | 14.2 MHz | 系统内可编程: | NO |
JESD-30 代码: | S-CQCC-J44 | JESD-609代码: | e0 |
JTAG BST: | NO | 长度: | 16.51 mm |
专用输入次数: | 7 | I/O 线路数量: | 28 |
宏单元数: | 128 | 端子数量: | 44 |
最高工作温度: | 125 °C | 最低工作温度: | -55 °C |
组织: | 7 DEDICATED INPUTS, 28 I/O | 输出函数: | MACROCELL |
封装主体材料: | CERAMIC, METAL-SEALED COFIRED | 封装代码: | WQCCJ |
封装等效代码: | LDCC44,.7SQ | 封装形状: | SQUARE |
封装形式: | CHIP CARRIER, WINDOW | 峰值回流温度(摄氏度): | NOT SPECIFIED |
电源: | 5 V | 可编程逻辑类型: | UV PLD |
传播延迟: | 90 ns | 认证状态: | Not Qualified |
筛选级别: | 38535Q/M;38534H;883B | 座面最大高度: | 4.57 mm |
子类别: | Programmable Logic Devices | 最大供电电压: | 5.5 V |
最小供电电压: | 4.5 V | 标称供电电压: | 5 V |
表面贴装: | YES | 技术: | CMOS |
温度等级: | MILITARY | 端子面层: | Tin/Lead (Sn/Pb) |
端子形式: | J BEND | 端子节距: | 1.27 mm |
端子位置: | QUAD | 处于峰值回流温度下的最长时间: | NOT SPECIFIED |
宽度: | 16.51 mm | Base Number Matches: | 1 |
型号 | 品牌 | 获取价格 | 描述 | 数据表 |
CY7C345-40JC | CYPRESS |
获取价格 |
OT PLD, 40ns, 128-Cell, CMOS, PQCC44, PLASTIC, LCC-44 | |
CY7C345-40JCR | CYPRESS |
获取价格 |
OT PLD, CMOS, PQCC44, PLASTIC, LCC-44 | |
CY7C345-40JCT | CYPRESS |
获取价格 |
OT PLD, CMOS, PQCC44, PLASTIC, LCC-44 | |
CY7C346 | CYPRESS |
获取价格 |
USE ULTRA37000TM FOR ALL NEW DESIGNS(128-Macrocell MAX EPLD) | |
CY7C346(B) | CYPRESS |
获取价格 |
Multiple Array Matrix High-Density EPLDs | |
CY7C346-25 | CYPRESS |
获取价格 |
USE ULTRA37000TM FOR ALL NEW DESIGNS(128-Macrocell MAX EPLD) | |
CY7C346-25HC | CYPRESS |
获取价格 |
USE ULTRA37000TM FOR ALL NEW DESIGNS(128-Macrocell MAX EPLD) | |
CY7C346-25HI | CYPRESS |
获取价格 |
USE ULTRA37000TM FOR ALL NEW DESIGNS(128-Macrocell MAX EPLD) | |
CY7C346-25JC | CYPRESS |
获取价格 |
USE ULTRA37000TM FOR ALL NEW DESIGNS(128-Macrocell MAX EPLD) | |
CY7C346-25JCR | CYPRESS |
获取价格 |
OT PLD, 52ns, CMOS, PQCC84, PLASTIC, LCC-84 |