生命周期: | Obsolete | 零件包装代码: | LCC |
包装说明: | QCCJ, | 针数: | 84 |
Reach Compliance Code: | unknown | HTS代码: | 8542.39.00.01 |
风险等级: | 5.82 | 其他特性: | LABS INTERCONNECTED BY PIA; 12 LABS; 192 MACROCELLS; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK |
最大时钟频率: | 22.2 MHz | JESD-30 代码: | S-PQCC-J84 |
长度: | 29.3116 mm | 专用输入次数: | 7 |
I/O 线路数量: | 64 | 端子数量: | 84 |
最高工作温度: | 85 °C | 最低工作温度: | -40 °C |
组织: | 7 DEDICATED INPUTS, 64 I/O | 输出函数: | MACROCELL |
封装主体材料: | PLASTIC/EPOXY | 封装代码: | QCCJ |
封装形状: | SQUARE | 封装形式: | CHIP CARRIER |
可编程逻辑类型: | OT PLD | 传播延迟: | 75 ns |
认证状态: | Not Qualified | 座面最大高度: | 5.08 mm |
最大供电电压: | 5.5 V | 最小供电电压: | 4.5 V |
标称供电电压: | 5 V | 表面贴装: | YES |
技术: | CMOS | 温度等级: | INDUSTRIAL |
端子形式: | J BEND | 端子节距: | 1.27 mm |
端子位置: | QUAD | 宽度: | 29.3116 mm |
Base Number Matches: | 1 |
型号 | 品牌 | 获取价格 | 描述 | 数据表 |
CY7C341B-35RC | CYPRESS |
获取价格 |
UV PLD, 55ns, 192-Cell, CMOS, CPGA84, WINDOWED, PGA-84 | |
CY7C341B-35RC/RI | CYPRESS |
获取价格 |
192-Macrocell MAX EPLD | |
CY7C341B-35RI | ETC |
获取价格 |
UV-Erasable/OTP Complex PLD | |
CY7C341B-35RMB | ETC |
获取价格 |
UV-Erasable/OTP Complex PLD | |
CY7C342 | CYPRESS |
获取价格 |
128-Macrocell MAX EPLDs | |
CY7C342-25 | CYPRESS |
获取价格 |
128-Macrocell MAX EPLDs | |
CY7C342-25HI | CYPRESS |
获取价格 |
UV PLD, 51ns, 128-Cell, CMOS, CQCC68, WINDOWED, CERAMIC, LCC-68 | |
CY7C342-25JC | CYPRESS |
获取价格 |
OT PLD, 51ns, 128-Cell, CMOS, PQCC68, PLASTIC, LCC-68 | |
CY7C342-25JCR | CYPRESS |
获取价格 |
OT PLD, 51ns, CMOS, PQCC68, PLASTIC, LCC-68 | |
CY7C342-25JCT | CYPRESS |
获取价格 |
OT PLD, 51ns, CMOS, PQCC68, PLASTIC, LCC-68 |