CY7C1663KV18/CY7C1665KV18
Contents
Pin Configurations ...........................................................4
Pin Definitions ..................................................................5
Functional Overview ........................................................6
Read Operations .........................................................6
Write Operations .........................................................6
Byte Write Operations .................................................7
Concurrent Transactions .............................................7
Depth Expansion .........................................................7
Programmable Impedance ..........................................7
Echo Clocks ................................................................7
Valid Data Indicator (QVLD) ........................................7
PLL ..............................................................................7
Application Example ........................................................8
Truth Table ........................................................................9
Write Cycle Descriptions ...............................................10
Write Cycle Descriptions ...............................................11
IEEE 1149.1 Serial Boundary Scan (JTAG) ..................12
Disabling the JTAG Feature ......................................12
Test Access Port .......................................................12
Performing a TAP Reset ...........................................12
TAP Registers ...........................................................12
TAP Instruction Set ...................................................12
TAP Controller State Diagram .......................................14
TAP Controller Block Diagram ......................................15
TAP Electrical Characteristics ......................................15
TAP AC Switching Characteristics ...............................16
TAP Timing and Test Conditions ..................................17
Identification Register Definitions ................................18
Scan Register Sizes .......................................................18
Instruction Codes ...........................................................18
Boundary Scan Order ....................................................19
Power Up Sequence in QDR II+ SRAM .........................20
Power Up Sequence .................................................20
PLL Constraints .........................................................20
Maximum Ratings ...........................................................21
Operating Range .............................................................21
Neutron Soft Error Immunity .........................................21
Electrical Characteristics ...............................................21
DC Electrical Characteristics .....................................21
AC Electrical Characteristics .....................................23
Capacitance ....................................................................23
Thermal Resistance ........................................................23
AC Test Loads and Waveforms .....................................23
Switching Characteristics ..............................................24
Switching Waveforms ....................................................25
Read/Write/Deselect Sequence ................................25
Ordering Information ......................................................26
Ordering Code Definitions .........................................26
Package Diagram ............................................................27
Acronyms ........................................................................28
Document Conventions .................................................28
Units of Measure .......................................................28
Document History Page .................................................29
Sales, Solutions, and Legal Information ......................31
Worldwide Sales and Design Support .......................31
Products ....................................................................31
PSoC® Solutions ......................................................31
Cypress Developer Community .................................31
Technical Support .....................................................31
Document Number: 001-44060 Rev. *M
Page 3 of 31
5秒后页面跳转
压敏电阻器在直流电路中的过压保护应用探讨
电感耐压值及其与电感大小的关系
CNY17F光耦合器：特性、应用、封装、引脚功能及替换型号解析
DS1307资料解析：特性、引脚说明、替代推荐
微信公众号
抖音公众号
浙公网安备 33010502006866号 浙ICP备10014259号-119
营业执照ICP证
数据手册
如果您发现信息不准确，
