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CY74FCT827ATQCTE4 PDF预览

CY74FCT827ATQCTE4

更新时间： 2024-11-25 12:43:51
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德州仪器 - TI 输出元件
页数 文件大小 规格书
11页 289K
描述
10-BIT BUFFERS WITH 3-STATE OUTPUTS

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CY74FCT827ATQCTE4 数据手册

 浏览型号CY74FCT827ATQCTE4的Datasheet PDF文件第2页浏览型号CY74FCT827ATQCTE4的Datasheet PDF文件第3页浏览型号CY74FCT827ATQCTE4的Datasheet PDF文件第4页浏览型号CY74FCT827ATQCTE4的Datasheet PDF文件第5页浏览型号CY74FCT827ATQCTE4的Datasheet PDF文件第6页浏览型号CY74FCT827ATQCTE4的Datasheet PDF文件第7页 
CY54FCT827T, CY74FCT827T  
10-BIT BUFFERS  
WITH 3-STATE OUTPUTS  
SCCS034A – SEPTEMBER 1994 – REVISED OCTOBER 2001  
CY74FCT827T . . . Q OR SO PACKAGE  
(TOP VIEW)  
Function, Pinout, and Drive Compatible  
With FCT, F, and AM29827 Logic  
Reduced V  
of Equivalent FCT Functions  
(Typically = 3.3 V) Versions  
OE  
D
D
D
D
D
D
D
D
D
D
V
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
1
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
14  
OH  
1
0
1
2
3
4
5
6
7
8
9
CC  
0
2
Edge-Rate Control Circuitry for  
Significantly Improved Noise  
Characteristics  
3
1
4
2
5
3
6
4
I
Supports Partial-Power-Down Mode  
off  
7
Operation  
5
8
6
ESD Protection Exceeds JESD 22  
– 2000-V Human-Body Model (A114-A)  
– 200-V Machine Model (A115-A)  
9
7
10  
11  
8
9
– 1000-V Charged-Device Model (C101)  
GND 12  
13 OE  
2
3-State Outputs  
Matched Rise and Fall Times  
CY74FCT827T . . . L PACKAGE  
(TOP VIEW)  
Fully Compatible With TTL Input and  
Output Logic Levels  
CY54FCT827T  
– 32-mA Output Sink Current  
– 12-mA Output Source Current  
4
3
2
1
28 27 26  
25  
5
D
D
D
Y
Y
Y
2
3
4
2
3
4
CY74FCT827T  
– 64-mA Output Sink Current  
– 32-mA Output Source Current  
6
24  
23  
22  
21  
20  
19  
7
8
NC  
NC  
9
D
D
D
Y
Y
Y
5
6
7
5
6
7
description  
10  
11  
The ’FCT827T devices are 10-bit bus drivers that  
provide high-performance bus-interface buffering  
for wide data/address paths or buses carrying  
parity. The 10-bit buffers have NANDed output  
enables for maximum control flexibility. The  
12 13 14 15 16 17 18  
NC – No internal connection  
’FCT827T  
devices  
are  
designed  
for  
high-capacitance-load drive capability, while  
providing low-capacitance bus loading at both  
inputs and outputs. All outputs are designed for  
low-capacitance  
bus  
loading  
in  
the  
high-impedance state.  
This device is fully specified for partial-power-down applications using I . The I circuitry disables the outputs,  
off  
off  
preventing damaging current backflow through the device when it is powered down.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2001, Texas Instruments Incorporated  
On products compliant to MIL-PRF-38535, all parameters are tested  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
unless otherwise noted. On all other products, production  
testing of all parameters.  
processing does not necessarily include testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...11

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CY74FCT827ATQCTE4 替代型号

型号 品牌 替代类型 描述 数据表
CY74FCT827CTQCTG4 TI

完全替代

 10-BIT BUFFERS WITH 3-STATE OUTPUTS
CY74FCT827ATQCT TI

完全替代

 10-Bit Buffer

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