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CY74FCT163646APVC PDF预览

CY74FCT163646APVC

更新时间： 2024-11-09 14:48:43
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 光电二极管逻辑集成电路触发器
页数 文件大小 规格书
7页 142K
描述
Registered Bus Transceiver, FCT Series, 2-Func, 8-Bit, True Output, CMOS, PDSO56, 0.300 INCH, 0.025 INCH PITCH, SSOP-56

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中文翻译

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CY74FCT163646APVC 技术参数

是否无铅： 含铅是否Rohs认证： 不符合
生命周期：Obsolete零件包装代码：SSOP
包装说明：SSOP, SSOP56,.4针数：56
Reach Compliance Code：not_compliant风险等级：5.49
其他特性：WITH DIRECTION CONTROL控制类型：INDEPENDENT CONTROL
计数方向：BIDIRECTIONAL系列：FCT
JESD-30 代码：R-PDSO-G56JESD-609代码：e0
长度：18.415 mm负载电容（CL）：50 pF
逻辑集成电路类型：REGISTERED BUS TRANSCEIVER最大I（ol）：0.024 A
位数：8功能数量：2
端口数量：2端子数量：56
最高工作温度：85 °C最低工作温度：-40 °C
输出特性：3-STATE输出极性：TRUE
封装主体材料：PLASTIC/EPOXY封装代码：SSOP
封装等效代码：SSOP56,.4封装形状：RECTANGULAR
封装形式：SMALL OUTLINE, SHRINK PITCH峰值回流温度（摄氏度）：NOT SPECIFIED
电源：3/3.3 VProp。Delay @ Nom-Sup：6.3 ns
传播延迟（tpd）：6.3 ns认证状态：Not Qualified
座面最大高度：2.794 mm子类别：Bus Driver/Transceivers
最大供电电压 (Vsup)：3.6 V最小供电电压 (Vsup)：2.7 V
标称供电电压 (Vsup)：3.3 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子面层：Tin/Lead (Sn/Pb)端子形式：GULL WING
端子节距：0.635 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED翻译：N/A
触发器类型：POSITIVE EDGE宽度：7.5 mm
Base Number Matches：1

CY74FCT163646APVC 数据手册

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1CY74FCT163646  
fax id: 7052  
CY74FCT163646  
16-Bit Registered Transceiver  
Features  
Functional Description  
• 5V tolerant Inputs and Outputs  
• 24 mA balanced drive outputs  
• Low power, pin-compatible replacement for  
LCX, LPT, LVC, LVCH & LVT families  
• FCT-C speed at 5.4 ns  
• Power-off disable outputs permits live insertion  
• Edge-rate control circuitry for significantly improved  
noise characteristics  
• Typical output skew < 250 ps  
• ESD > 2000V  
• TSSOP (19.6-mil pitch) and SSOP (25-mil pitch)  
packages  
The CY74FCT163646 16-bit transceiver is a three-state,  
D-type register, and control circuitry arranged for multiplexed  
transmission of data directly from the input bus or from the  
internal registers. Data on the A or B bus will be clocked into  
the registers as the appropriate clock pin goes to a HIGH logic  
level. Output Enable (OE) and direction pins (DIR) are  
provided to control the transceiver function. In the transceiver  
mode, data present at the high impedance port may be stored  
in either the A or B register, or in both. The select controls can  
multiplex stored and real-time (transparent mode) data. The  
direction control determines which bus will receive data when  
the Output Enable (OE) is Active LOW. In the isolation mode  
(Output Enable (OE) HIGH), A data may be stored in the B  
register and/or B data may be stored in the A register.  
• Extended commercial temperature range of  
−40°C to +85°C  
The CY74FCT163646 has 24-mA balanced output drivers with  
current limiting resistors in the outputs. This reduces the need  
for external terminating resistors and provides for minimal  
undershoot and reduced ground bounce. The inputs and  
outputs were designed to be capable of being driven by 5.0 V  
busses, allowing them to be used in mixed voltage systems as  
translators. The outputs are also designed with a power-off  
disable feature enabling them to be used in applications  
requiring live insertion.  
• V = 2.7V to 3.6V  
CC  
• Typical V  
(ground bounce) <0.6V at V = 3.3V,  
CC  
OLP  
T = 25°C  
A
Logic Block Diagrams  
OE  
2
OE  
1
DIR  
2
DIR  
CLKBA  
SBA  
CLKAB  
1
CLKBA  
2
1
SBA  
CLKAB  
2
1
2
1
SAB  
2
SAB  
1
B REG  
D
B REG  
D
C
C
A
2 1  
A REG  
D
B
2
1
A REG  
D
B
1
1
A
1 1  
C
C
TO 7 OTHER CHANNELS  
TO 7 OTHER CHANNELS  
Cypress Semiconductor Corporation  
•
3901 North First Street  
•
San Jose  
•
CA 95134  
•
408-943-2600  
March 20, 1997  
1234567

中文翻译

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